esp32/uart0/
idle_conf.rs

1#[doc = "Register `IDLE_CONF` reader"]
2pub type R = crate::R<IDLE_CONF_SPEC>;
3#[doc = "Register `IDLE_CONF` writer"]
4pub type W = crate::W<IDLE_CONF_SPEC>;
5#[doc = "Field `RX_IDLE_THRHD` reader - when receiver takes more time than this register value to receive a byte data. it will produce frame end signal for uhci to stop receiving data."]
6pub type RX_IDLE_THRHD_R = crate::FieldReader<u16>;
7#[doc = "Field `RX_IDLE_THRHD` writer - when receiver takes more time than this register value to receive a byte data. it will produce frame end signal for uhci to stop receiving data."]
8pub type RX_IDLE_THRHD_W<'a, REG> = crate::FieldWriter<'a, REG, 10, u16>;
9#[doc = "Field `TX_IDLE_NUM` reader - This register is used to configure the duration time between transfers."]
10pub type TX_IDLE_NUM_R = crate::FieldReader<u16>;
11#[doc = "Field `TX_IDLE_NUM` writer - This register is used to configure the duration time between transfers."]
12pub type TX_IDLE_NUM_W<'a, REG> = crate::FieldWriter<'a, REG, 10, u16>;
13#[doc = "Field `TX_BRK_NUM` reader - This register is used to configure the num of 0 send after the process of sending data is done. it is active when txd_brk is set to 1."]
14pub type TX_BRK_NUM_R = crate::FieldReader;
15#[doc = "Field `TX_BRK_NUM` writer - This register is used to configure the num of 0 send after the process of sending data is done. it is active when txd_brk is set to 1."]
16pub type TX_BRK_NUM_W<'a, REG> = crate::FieldWriter<'a, REG, 8>;
17impl R {
18    #[doc = "Bits 0:9 - when receiver takes more time than this register value to receive a byte data. it will produce frame end signal for uhci to stop receiving data."]
19    #[inline(always)]
20    pub fn rx_idle_thrhd(&self) -> RX_IDLE_THRHD_R {
21        RX_IDLE_THRHD_R::new((self.bits & 0x03ff) as u16)
22    }
23    #[doc = "Bits 10:19 - This register is used to configure the duration time between transfers."]
24    #[inline(always)]
25    pub fn tx_idle_num(&self) -> TX_IDLE_NUM_R {
26        TX_IDLE_NUM_R::new(((self.bits >> 10) & 0x03ff) as u16)
27    }
28    #[doc = "Bits 20:27 - This register is used to configure the num of 0 send after the process of sending data is done. it is active when txd_brk is set to 1."]
29    #[inline(always)]
30    pub fn tx_brk_num(&self) -> TX_BRK_NUM_R {
31        TX_BRK_NUM_R::new(((self.bits >> 20) & 0xff) as u8)
32    }
33}
34#[cfg(feature = "impl-register-debug")]
35impl core::fmt::Debug for R {
36    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
37        f.debug_struct("IDLE_CONF")
38            .field("rx_idle_thrhd", &self.rx_idle_thrhd())
39            .field("tx_idle_num", &self.tx_idle_num())
40            .field("tx_brk_num", &self.tx_brk_num())
41            .finish()
42    }
43}
44impl W {
45    #[doc = "Bits 0:9 - when receiver takes more time than this register value to receive a byte data. it will produce frame end signal for uhci to stop receiving data."]
46    #[inline(always)]
47    pub fn rx_idle_thrhd(&mut self) -> RX_IDLE_THRHD_W<IDLE_CONF_SPEC> {
48        RX_IDLE_THRHD_W::new(self, 0)
49    }
50    #[doc = "Bits 10:19 - This register is used to configure the duration time between transfers."]
51    #[inline(always)]
52    pub fn tx_idle_num(&mut self) -> TX_IDLE_NUM_W<IDLE_CONF_SPEC> {
53        TX_IDLE_NUM_W::new(self, 10)
54    }
55    #[doc = "Bits 20:27 - This register is used to configure the num of 0 send after the process of sending data is done. it is active when txd_brk is set to 1."]
56    #[inline(always)]
57    pub fn tx_brk_num(&mut self) -> TX_BRK_NUM_W<IDLE_CONF_SPEC> {
58        TX_BRK_NUM_W::new(self, 20)
59    }
60}
61#[doc = "\n\nYou can [`read`](crate::Reg::read) this register and get [`idle_conf::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`idle_conf::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
62pub struct IDLE_CONF_SPEC;
63impl crate::RegisterSpec for IDLE_CONF_SPEC {
64    type Ux = u32;
65}
66#[doc = "`read()` method returns [`idle_conf::R`](R) reader structure"]
67impl crate::Readable for IDLE_CONF_SPEC {}
68#[doc = "`write(|w| ..)` method takes [`idle_conf::W`](W) writer structure"]
69impl crate::Writable for IDLE_CONF_SPEC {
70    type Safety = crate::Unsafe;
71}
72#[doc = "`reset()` method sets IDLE_CONF to value 0x00a4_0100"]
73impl crate::Resettable for IDLE_CONF_SPEC {
74    const RESET_VALUE: u32 = 0x00a4_0100;
75}
esp32/uart0/idle_conf.rs

esp32/uart0/
idle_conf.rs
