esp32/sens/
sar_start_force.rs1#[doc = "Register `SAR_START_FORCE` reader"]
2pub type R = crate::R<SAR_START_FORCE_SPEC>;
3#[doc = "Register `SAR_START_FORCE` writer"]
4pub type W = crate::W<SAR_START_FORCE_SPEC>;
5#[doc = "Field `SAR1_BIT_WIDTH` reader - 00: 9 bit 01: 10 bits 10: 11bits 11: 12bits"]
6pub type SAR1_BIT_WIDTH_R = crate::FieldReader;
7#[doc = "Field `SAR1_BIT_WIDTH` writer - 00: 9 bit 01: 10 bits 10: 11bits 11: 12bits"]
8pub type SAR1_BIT_WIDTH_W<'a, REG> = crate::FieldWriter<'a, REG, 2>;
9#[doc = "Field `SAR2_BIT_WIDTH` reader - 00: 9 bit 01: 10 bits 10: 11bits 11: 12bits"]
10pub type SAR2_BIT_WIDTH_R = crate::FieldReader;
11#[doc = "Field `SAR2_BIT_WIDTH` writer - 00: 9 bit 01: 10 bits 10: 11bits 11: 12bits"]
12pub type SAR2_BIT_WIDTH_W<'a, REG> = crate::FieldWriter<'a, REG, 2>;
13#[doc = "Field `SAR2_EN_TEST` reader - SAR2_EN_TEST only active when reg_sar2_dig_force = 0"]
14pub type SAR2_EN_TEST_R = crate::BitReader;
15#[doc = "Field `SAR2_EN_TEST` writer - SAR2_EN_TEST only active when reg_sar2_dig_force = 0"]
16pub type SAR2_EN_TEST_W<'a, REG> = crate::BitWriter<'a, REG>;
17#[doc = "Field `SAR2_PWDET_CCT` reader - SAR2_PWDET_CCT PA power detector capacitance tuning."]
18pub type SAR2_PWDET_CCT_R = crate::FieldReader;
19#[doc = "Field `SAR2_PWDET_CCT` writer - SAR2_PWDET_CCT PA power detector capacitance tuning."]
20pub type SAR2_PWDET_CCT_W<'a, REG> = crate::FieldWriter<'a, REG, 3>;
21#[doc = "Field `ULP_CP_FORCE_START_TOP` reader - 1: ULP-coprocessor is started by SW 0: ULP-coprocessor is started by timer"]
22pub type ULP_CP_FORCE_START_TOP_R = crate::BitReader;
23#[doc = "Field `ULP_CP_FORCE_START_TOP` writer - 1: ULP-coprocessor is started by SW 0: ULP-coprocessor is started by timer"]
24pub type ULP_CP_FORCE_START_TOP_W<'a, REG> = crate::BitWriter<'a, REG>;
25#[doc = "Field `ULP_CP_START_TOP` reader - Write 1 to start ULP-coprocessor only active when reg_ulp_cp_force_start_top = 1"]
26pub type ULP_CP_START_TOP_R = crate::BitReader;
27#[doc = "Field `ULP_CP_START_TOP` writer - Write 1 to start ULP-coprocessor only active when reg_ulp_cp_force_start_top = 1"]
28pub type ULP_CP_START_TOP_W<'a, REG> = crate::BitWriter<'a, REG>;
29#[doc = "Field `SARCLK_EN` reader - "]
30pub type SARCLK_EN_R = crate::BitReader;
31#[doc = "Field `SARCLK_EN` writer - "]
32pub type SARCLK_EN_W<'a, REG> = crate::BitWriter<'a, REG>;
33#[doc = "Field `PC_INIT` reader - initialized PC for ULP-coprocessor"]
34pub type PC_INIT_R = crate::FieldReader<u16>;
35#[doc = "Field `PC_INIT` writer - initialized PC for ULP-coprocessor"]
36pub type PC_INIT_W<'a, REG> = crate::FieldWriter<'a, REG, 11, u16>;
37#[doc = "Field `SAR2_STOP` reader - stop SAR ADC2 conversion"]
38pub type SAR2_STOP_R = crate::BitReader;
39#[doc = "Field `SAR2_STOP` writer - stop SAR ADC2 conversion"]
40pub type SAR2_STOP_W<'a, REG> = crate::BitWriter<'a, REG>;
41#[doc = "Field `SAR1_STOP` reader - stop SAR ADC1 conversion"]
42pub type SAR1_STOP_R = crate::BitReader;
43#[doc = "Field `SAR1_STOP` writer - stop SAR ADC1 conversion"]
44pub type SAR1_STOP_W<'a, REG> = crate::BitWriter<'a, REG>;
45#[doc = "Field `SAR2_PWDET_EN` reader - N/A"]
46pub type SAR2_PWDET_EN_R = crate::BitReader;
47#[doc = "Field `SAR2_PWDET_EN` writer - N/A"]
48pub type SAR2_PWDET_EN_W<'a, REG> = crate::BitWriter<'a, REG>;
49impl R {
50 #[doc = "Bits 0:1 - 00: 9 bit 01: 10 bits 10: 11bits 11: 12bits"]
51 #[inline(always)]
52 pub fn sar1_bit_width(&self) -> SAR1_BIT_WIDTH_R {
53 SAR1_BIT_WIDTH_R::new((self.bits & 3) as u8)
54 }
55 #[doc = "Bits 2:3 - 00: 9 bit 01: 10 bits 10: 11bits 11: 12bits"]
56 #[inline(always)]
57 pub fn sar2_bit_width(&self) -> SAR2_BIT_WIDTH_R {
58 SAR2_BIT_WIDTH_R::new(((self.bits >> 2) & 3) as u8)
59 }
60 #[doc = "Bit 4 - SAR2_EN_TEST only active when reg_sar2_dig_force = 0"]
61 #[inline(always)]
62 pub fn sar2_en_test(&self) -> SAR2_EN_TEST_R {
63 SAR2_EN_TEST_R::new(((self.bits >> 4) & 1) != 0)
64 }
65 #[doc = "Bits 5:7 - SAR2_PWDET_CCT PA power detector capacitance tuning."]
66 #[inline(always)]
67 pub fn sar2_pwdet_cct(&self) -> SAR2_PWDET_CCT_R {
68 SAR2_PWDET_CCT_R::new(((self.bits >> 5) & 7) as u8)
69 }
70 #[doc = "Bit 8 - 1: ULP-coprocessor is started by SW 0: ULP-coprocessor is started by timer"]
71 #[inline(always)]
72 pub fn ulp_cp_force_start_top(&self) -> ULP_CP_FORCE_START_TOP_R {
73 ULP_CP_FORCE_START_TOP_R::new(((self.bits >> 8) & 1) != 0)
74 }
75 #[doc = "Bit 9 - Write 1 to start ULP-coprocessor only active when reg_ulp_cp_force_start_top = 1"]
76 #[inline(always)]
77 pub fn ulp_cp_start_top(&self) -> ULP_CP_START_TOP_R {
78 ULP_CP_START_TOP_R::new(((self.bits >> 9) & 1) != 0)
79 }
80 #[doc = "Bit 10"]
81 #[inline(always)]
82 pub fn sarclk_en(&self) -> SARCLK_EN_R {
83 SARCLK_EN_R::new(((self.bits >> 10) & 1) != 0)
84 }
85 #[doc = "Bits 11:21 - initialized PC for ULP-coprocessor"]
86 #[inline(always)]
87 pub fn pc_init(&self) -> PC_INIT_R {
88 PC_INIT_R::new(((self.bits >> 11) & 0x07ff) as u16)
89 }
90 #[doc = "Bit 22 - stop SAR ADC2 conversion"]
91 #[inline(always)]
92 pub fn sar2_stop(&self) -> SAR2_STOP_R {
93 SAR2_STOP_R::new(((self.bits >> 22) & 1) != 0)
94 }
95 #[doc = "Bit 23 - stop SAR ADC1 conversion"]
96 #[inline(always)]
97 pub fn sar1_stop(&self) -> SAR1_STOP_R {
98 SAR1_STOP_R::new(((self.bits >> 23) & 1) != 0)
99 }
100 #[doc = "Bit 24 - N/A"]
101 #[inline(always)]
102 pub fn sar2_pwdet_en(&self) -> SAR2_PWDET_EN_R {
103 SAR2_PWDET_EN_R::new(((self.bits >> 24) & 1) != 0)
104 }
105}
106#[cfg(feature = "impl-register-debug")]
107impl core::fmt::Debug for R {
108 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
109 f.debug_struct("SAR_START_FORCE")
110 .field("sar1_bit_width", &self.sar1_bit_width())
111 .field("sar2_bit_width", &self.sar2_bit_width())
112 .field("sar2_en_test", &self.sar2_en_test())
113 .field("sar2_pwdet_cct", &self.sar2_pwdet_cct())
114 .field("ulp_cp_force_start_top", &self.ulp_cp_force_start_top())
115 .field("ulp_cp_start_top", &self.ulp_cp_start_top())
116 .field("sarclk_en", &self.sarclk_en())
117 .field("pc_init", &self.pc_init())
118 .field("sar2_stop", &self.sar2_stop())
119 .field("sar1_stop", &self.sar1_stop())
120 .field("sar2_pwdet_en", &self.sar2_pwdet_en())
121 .finish()
122 }
123}
124impl W {
125 #[doc = "Bits 0:1 - 00: 9 bit 01: 10 bits 10: 11bits 11: 12bits"]
126 #[inline(always)]
127 pub fn sar1_bit_width(&mut self) -> SAR1_BIT_WIDTH_W<SAR_START_FORCE_SPEC> {
128 SAR1_BIT_WIDTH_W::new(self, 0)
129 }
130 #[doc = "Bits 2:3 - 00: 9 bit 01: 10 bits 10: 11bits 11: 12bits"]
131 #[inline(always)]
132 pub fn sar2_bit_width(&mut self) -> SAR2_BIT_WIDTH_W<SAR_START_FORCE_SPEC> {
133 SAR2_BIT_WIDTH_W::new(self, 2)
134 }
135 #[doc = "Bit 4 - SAR2_EN_TEST only active when reg_sar2_dig_force = 0"]
136 #[inline(always)]
137 pub fn sar2_en_test(&mut self) -> SAR2_EN_TEST_W<SAR_START_FORCE_SPEC> {
138 SAR2_EN_TEST_W::new(self, 4)
139 }
140 #[doc = "Bits 5:7 - SAR2_PWDET_CCT PA power detector capacitance tuning."]
141 #[inline(always)]
142 pub fn sar2_pwdet_cct(&mut self) -> SAR2_PWDET_CCT_W<SAR_START_FORCE_SPEC> {
143 SAR2_PWDET_CCT_W::new(self, 5)
144 }
145 #[doc = "Bit 8 - 1: ULP-coprocessor is started by SW 0: ULP-coprocessor is started by timer"]
146 #[inline(always)]
147 pub fn ulp_cp_force_start_top(&mut self) -> ULP_CP_FORCE_START_TOP_W<SAR_START_FORCE_SPEC> {
148 ULP_CP_FORCE_START_TOP_W::new(self, 8)
149 }
150 #[doc = "Bit 9 - Write 1 to start ULP-coprocessor only active when reg_ulp_cp_force_start_top = 1"]
151 #[inline(always)]
152 pub fn ulp_cp_start_top(&mut self) -> ULP_CP_START_TOP_W<SAR_START_FORCE_SPEC> {
153 ULP_CP_START_TOP_W::new(self, 9)
154 }
155 #[doc = "Bit 10"]
156 #[inline(always)]
157 pub fn sarclk_en(&mut self) -> SARCLK_EN_W<SAR_START_FORCE_SPEC> {
158 SARCLK_EN_W::new(self, 10)
159 }
160 #[doc = "Bits 11:21 - initialized PC for ULP-coprocessor"]
161 #[inline(always)]
162 pub fn pc_init(&mut self) -> PC_INIT_W<SAR_START_FORCE_SPEC> {
163 PC_INIT_W::new(self, 11)
164 }
165 #[doc = "Bit 22 - stop SAR ADC2 conversion"]
166 #[inline(always)]
167 pub fn sar2_stop(&mut self) -> SAR2_STOP_W<SAR_START_FORCE_SPEC> {
168 SAR2_STOP_W::new(self, 22)
169 }
170 #[doc = "Bit 23 - stop SAR ADC1 conversion"]
171 #[inline(always)]
172 pub fn sar1_stop(&mut self) -> SAR1_STOP_W<SAR_START_FORCE_SPEC> {
173 SAR1_STOP_W::new(self, 23)
174 }
175 #[doc = "Bit 24 - N/A"]
176 #[inline(always)]
177 pub fn sar2_pwdet_en(&mut self) -> SAR2_PWDET_EN_W<SAR_START_FORCE_SPEC> {
178 SAR2_PWDET_EN_W::new(self, 24)
179 }
180}
181#[doc = "\n\nYou can [`read`](crate::Reg::read) this register and get [`sar_start_force::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sar_start_force::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
182pub struct SAR_START_FORCE_SPEC;
183impl crate::RegisterSpec for SAR_START_FORCE_SPEC {
184 type Ux = u32;
185}
186#[doc = "`read()` method returns [`sar_start_force::R`](R) reader structure"]
187impl crate::Readable for SAR_START_FORCE_SPEC {}
188#[doc = "`write(|w| ..)` method takes [`sar_start_force::W`](W) writer structure"]
189impl crate::Writable for SAR_START_FORCE_SPEC {
190 type Safety = crate::Unsafe;
191}
192#[doc = "`reset()` method sets SAR_START_FORCE to value 0x0f"]
193impl crate::Resettable for SAR_START_FORCE_SPEC {
194 const RESET_VALUE: u32 = 0x0f;
195}