1#[doc = "Register `DIG_PWC` reader"]
2pub type R = crate::R<DIG_PWC_SPEC>;
3#[doc = "Register `DIG_PWC` writer"]
4pub type W = crate::W<DIG_PWC_SPEC>;
5#[doc = "Field `LSLP_MEM_FORCE_PD` reader - memories in digital core force PD in sleep"]
6pub type LSLP_MEM_FORCE_PD_R = crate::BitReader;
7#[doc = "Field `LSLP_MEM_FORCE_PD` writer - memories in digital core force PD in sleep"]
8pub type LSLP_MEM_FORCE_PD_W<'a, REG> = crate::BitWriter<'a, REG>;
9#[doc = "Field `LSLP_MEM_FORCE_PU` reader - memories in digital core force no PD in sleep"]
10pub type LSLP_MEM_FORCE_PU_R = crate::BitReader;
11#[doc = "Field `LSLP_MEM_FORCE_PU` writer - memories in digital core force no PD in sleep"]
12pub type LSLP_MEM_FORCE_PU_W<'a, REG> = crate::BitWriter<'a, REG>;
13#[doc = "Field `ROM0_FORCE_PD` reader - ROM force power down"]
14pub type ROM0_FORCE_PD_R = crate::BitReader;
15#[doc = "Field `ROM0_FORCE_PD` writer - ROM force power down"]
16pub type ROM0_FORCE_PD_W<'a, REG> = crate::BitWriter<'a, REG>;
17#[doc = "Field `ROM0_FORCE_PU` reader - ROM force power up"]
18pub type ROM0_FORCE_PU_R = crate::BitReader;
19#[doc = "Field `ROM0_FORCE_PU` writer - ROM force power up"]
20pub type ROM0_FORCE_PU_W<'a, REG> = crate::BitWriter<'a, REG>;
21#[doc = "Field `INTER_RAM0_FORCE_PD` reader - internal SRAM 0 force power down"]
22pub type INTER_RAM0_FORCE_PD_R = crate::BitReader;
23#[doc = "Field `INTER_RAM0_FORCE_PD` writer - internal SRAM 0 force power down"]
24pub type INTER_RAM0_FORCE_PD_W<'a, REG> = crate::BitWriter<'a, REG>;
25#[doc = "Field `INTER_RAM0_FORCE_PU` reader - internal SRAM 0 force power up"]
26pub type INTER_RAM0_FORCE_PU_R = crate::BitReader;
27#[doc = "Field `INTER_RAM0_FORCE_PU` writer - internal SRAM 0 force power up"]
28pub type INTER_RAM0_FORCE_PU_W<'a, REG> = crate::BitWriter<'a, REG>;
29#[doc = "Field `INTER_RAM1_FORCE_PD` reader - internal SRAM 1 force power down"]
30pub type INTER_RAM1_FORCE_PD_R = crate::BitReader;
31#[doc = "Field `INTER_RAM1_FORCE_PD` writer - internal SRAM 1 force power down"]
32pub type INTER_RAM1_FORCE_PD_W<'a, REG> = crate::BitWriter<'a, REG>;
33#[doc = "Field `INTER_RAM1_FORCE_PU` reader - internal SRAM 1 force power up"]
34pub type INTER_RAM1_FORCE_PU_R = crate::BitReader;
35#[doc = "Field `INTER_RAM1_FORCE_PU` writer - internal SRAM 1 force power up"]
36pub type INTER_RAM1_FORCE_PU_W<'a, REG> = crate::BitWriter<'a, REG>;
37#[doc = "Field `INTER_RAM2_FORCE_PD` reader - internal SRAM 2 force power down"]
38pub type INTER_RAM2_FORCE_PD_R = crate::BitReader;
39#[doc = "Field `INTER_RAM2_FORCE_PD` writer - internal SRAM 2 force power down"]
40pub type INTER_RAM2_FORCE_PD_W<'a, REG> = crate::BitWriter<'a, REG>;
41#[doc = "Field `INTER_RAM2_FORCE_PU` reader - internal SRAM 2 force power up"]
42pub type INTER_RAM2_FORCE_PU_R = crate::BitReader;
43#[doc = "Field `INTER_RAM2_FORCE_PU` writer - internal SRAM 2 force power up"]
44pub type INTER_RAM2_FORCE_PU_W<'a, REG> = crate::BitWriter<'a, REG>;
45#[doc = "Field `INTER_RAM3_FORCE_PD` reader - internal SRAM 3 force power down"]
46pub type INTER_RAM3_FORCE_PD_R = crate::BitReader;
47#[doc = "Field `INTER_RAM3_FORCE_PD` writer - internal SRAM 3 force power down"]
48pub type INTER_RAM3_FORCE_PD_W<'a, REG> = crate::BitWriter<'a, REG>;
49#[doc = "Field `INTER_RAM3_FORCE_PU` reader - internal SRAM 3 force power up"]
50pub type INTER_RAM3_FORCE_PU_R = crate::BitReader;
51#[doc = "Field `INTER_RAM3_FORCE_PU` writer - internal SRAM 3 force power up"]
52pub type INTER_RAM3_FORCE_PU_W<'a, REG> = crate::BitWriter<'a, REG>;
53#[doc = "Field `INTER_RAM4_FORCE_PD` reader - internal SRAM 4 force power down"]
54pub type INTER_RAM4_FORCE_PD_R = crate::BitReader;
55#[doc = "Field `INTER_RAM4_FORCE_PD` writer - internal SRAM 4 force power down"]
56pub type INTER_RAM4_FORCE_PD_W<'a, REG> = crate::BitWriter<'a, REG>;
57#[doc = "Field `INTER_RAM4_FORCE_PU` reader - internal SRAM 4 force power up"]
58pub type INTER_RAM4_FORCE_PU_R = crate::BitReader;
59#[doc = "Field `INTER_RAM4_FORCE_PU` writer - internal SRAM 4 force power up"]
60pub type INTER_RAM4_FORCE_PU_W<'a, REG> = crate::BitWriter<'a, REG>;
61#[doc = "Field `WIFI_FORCE_PD` reader - wifi force power down"]
62pub type WIFI_FORCE_PD_R = crate::BitReader;
63#[doc = "Field `WIFI_FORCE_PD` writer - wifi force power down"]
64pub type WIFI_FORCE_PD_W<'a, REG> = crate::BitWriter<'a, REG>;
65#[doc = "Field `WIFI_FORCE_PU` reader - wifi force power up"]
66pub type WIFI_FORCE_PU_R = crate::BitReader;
67#[doc = "Field `WIFI_FORCE_PU` writer - wifi force power up"]
68pub type WIFI_FORCE_PU_W<'a, REG> = crate::BitWriter<'a, REG>;
69#[doc = "Field `DG_WRAP_FORCE_PD` reader - digital core force power down"]
70pub type DG_WRAP_FORCE_PD_R = crate::BitReader;
71#[doc = "Field `DG_WRAP_FORCE_PD` writer - digital core force power down"]
72pub type DG_WRAP_FORCE_PD_W<'a, REG> = crate::BitWriter<'a, REG>;
73#[doc = "Field `DG_WRAP_FORCE_PU` reader - digital core force power up"]
74pub type DG_WRAP_FORCE_PU_R = crate::BitReader;
75#[doc = "Field `DG_WRAP_FORCE_PU` writer - digital core force power up"]
76pub type DG_WRAP_FORCE_PU_W<'a, REG> = crate::BitWriter<'a, REG>;
77#[doc = "Field `ROM0_PD_EN` reader - enable power down ROM in sleep"]
78pub type ROM0_PD_EN_R = crate::BitReader;
79#[doc = "Field `ROM0_PD_EN` writer - enable power down ROM in sleep"]
80pub type ROM0_PD_EN_W<'a, REG> = crate::BitWriter<'a, REG>;
81#[doc = "Field `INTER_RAM0_PD_EN` reader - enable power down internal SRAM 0 in sleep"]
82pub type INTER_RAM0_PD_EN_R = crate::BitReader;
83#[doc = "Field `INTER_RAM0_PD_EN` writer - enable power down internal SRAM 0 in sleep"]
84pub type INTER_RAM0_PD_EN_W<'a, REG> = crate::BitWriter<'a, REG>;
85#[doc = "Field `INTER_RAM1_PD_EN` reader - enable power down internal SRAM 1 in sleep"]
86pub type INTER_RAM1_PD_EN_R = crate::BitReader;
87#[doc = "Field `INTER_RAM1_PD_EN` writer - enable power down internal SRAM 1 in sleep"]
88pub type INTER_RAM1_PD_EN_W<'a, REG> = crate::BitWriter<'a, REG>;
89#[doc = "Field `INTER_RAM2_PD_EN` reader - enable power down internal SRAM 2 in sleep"]
90pub type INTER_RAM2_PD_EN_R = crate::BitReader;
91#[doc = "Field `INTER_RAM2_PD_EN` writer - enable power down internal SRAM 2 in sleep"]
92pub type INTER_RAM2_PD_EN_W<'a, REG> = crate::BitWriter<'a, REG>;
93#[doc = "Field `INTER_RAM3_PD_EN` reader - enable power down internal SRAM 3 in sleep"]
94pub type INTER_RAM3_PD_EN_R = crate::BitReader;
95#[doc = "Field `INTER_RAM3_PD_EN` writer - enable power down internal SRAM 3 in sleep"]
96pub type INTER_RAM3_PD_EN_W<'a, REG> = crate::BitWriter<'a, REG>;
97#[doc = "Field `INTER_RAM4_PD_EN` reader - enable power down internal SRAM 4 in sleep"]
98pub type INTER_RAM4_PD_EN_R = crate::BitReader;
99#[doc = "Field `INTER_RAM4_PD_EN` writer - enable power down internal SRAM 4 in sleep"]
100pub type INTER_RAM4_PD_EN_W<'a, REG> = crate::BitWriter<'a, REG>;
101#[doc = "Field `WIFI_PD_EN` reader - enable power down wifi in sleep"]
102pub type WIFI_PD_EN_R = crate::BitReader;
103#[doc = "Field `WIFI_PD_EN` writer - enable power down wifi in sleep"]
104pub type WIFI_PD_EN_W<'a, REG> = crate::BitWriter<'a, REG>;
105#[doc = "Field `DG_WRAP_PD_EN` reader - enable power down digital core in sleep"]
106pub type DG_WRAP_PD_EN_R = crate::BitReader;
107#[doc = "Field `DG_WRAP_PD_EN` writer - enable power down digital core in sleep"]
108pub type DG_WRAP_PD_EN_W<'a, REG> = crate::BitWriter<'a, REG>;
109impl R {
110 #[doc = "Bit 3 - memories in digital core force PD in sleep"]
111 #[inline(always)]
112 pub fn lslp_mem_force_pd(&self) -> LSLP_MEM_FORCE_PD_R {
113 LSLP_MEM_FORCE_PD_R::new(((self.bits >> 3) & 1) != 0)
114 }
115 #[doc = "Bit 4 - memories in digital core force no PD in sleep"]
116 #[inline(always)]
117 pub fn lslp_mem_force_pu(&self) -> LSLP_MEM_FORCE_PU_R {
118 LSLP_MEM_FORCE_PU_R::new(((self.bits >> 4) & 1) != 0)
119 }
120 #[doc = "Bit 5 - ROM force power down"]
121 #[inline(always)]
122 pub fn rom0_force_pd(&self) -> ROM0_FORCE_PD_R {
123 ROM0_FORCE_PD_R::new(((self.bits >> 5) & 1) != 0)
124 }
125 #[doc = "Bit 6 - ROM force power up"]
126 #[inline(always)]
127 pub fn rom0_force_pu(&self) -> ROM0_FORCE_PU_R {
128 ROM0_FORCE_PU_R::new(((self.bits >> 6) & 1) != 0)
129 }
130 #[doc = "Bit 7 - internal SRAM 0 force power down"]
131 #[inline(always)]
132 pub fn inter_ram0_force_pd(&self) -> INTER_RAM0_FORCE_PD_R {
133 INTER_RAM0_FORCE_PD_R::new(((self.bits >> 7) & 1) != 0)
134 }
135 #[doc = "Bit 8 - internal SRAM 0 force power up"]
136 #[inline(always)]
137 pub fn inter_ram0_force_pu(&self) -> INTER_RAM0_FORCE_PU_R {
138 INTER_RAM0_FORCE_PU_R::new(((self.bits >> 8) & 1) != 0)
139 }
140 #[doc = "Bit 9 - internal SRAM 1 force power down"]
141 #[inline(always)]
142 pub fn inter_ram1_force_pd(&self) -> INTER_RAM1_FORCE_PD_R {
143 INTER_RAM1_FORCE_PD_R::new(((self.bits >> 9) & 1) != 0)
144 }
145 #[doc = "Bit 10 - internal SRAM 1 force power up"]
146 #[inline(always)]
147 pub fn inter_ram1_force_pu(&self) -> INTER_RAM1_FORCE_PU_R {
148 INTER_RAM1_FORCE_PU_R::new(((self.bits >> 10) & 1) != 0)
149 }
150 #[doc = "Bit 11 - internal SRAM 2 force power down"]
151 #[inline(always)]
152 pub fn inter_ram2_force_pd(&self) -> INTER_RAM2_FORCE_PD_R {
153 INTER_RAM2_FORCE_PD_R::new(((self.bits >> 11) & 1) != 0)
154 }
155 #[doc = "Bit 12 - internal SRAM 2 force power up"]
156 #[inline(always)]
157 pub fn inter_ram2_force_pu(&self) -> INTER_RAM2_FORCE_PU_R {
158 INTER_RAM2_FORCE_PU_R::new(((self.bits >> 12) & 1) != 0)
159 }
160 #[doc = "Bit 13 - internal SRAM 3 force power down"]
161 #[inline(always)]
162 pub fn inter_ram3_force_pd(&self) -> INTER_RAM3_FORCE_PD_R {
163 INTER_RAM3_FORCE_PD_R::new(((self.bits >> 13) & 1) != 0)
164 }
165 #[doc = "Bit 14 - internal SRAM 3 force power up"]
166 #[inline(always)]
167 pub fn inter_ram3_force_pu(&self) -> INTER_RAM3_FORCE_PU_R {
168 INTER_RAM3_FORCE_PU_R::new(((self.bits >> 14) & 1) != 0)
169 }
170 #[doc = "Bit 15 - internal SRAM 4 force power down"]
171 #[inline(always)]
172 pub fn inter_ram4_force_pd(&self) -> INTER_RAM4_FORCE_PD_R {
173 INTER_RAM4_FORCE_PD_R::new(((self.bits >> 15) & 1) != 0)
174 }
175 #[doc = "Bit 16 - internal SRAM 4 force power up"]
176 #[inline(always)]
177 pub fn inter_ram4_force_pu(&self) -> INTER_RAM4_FORCE_PU_R {
178 INTER_RAM4_FORCE_PU_R::new(((self.bits >> 16) & 1) != 0)
179 }
180 #[doc = "Bit 17 - wifi force power down"]
181 #[inline(always)]
182 pub fn wifi_force_pd(&self) -> WIFI_FORCE_PD_R {
183 WIFI_FORCE_PD_R::new(((self.bits >> 17) & 1) != 0)
184 }
185 #[doc = "Bit 18 - wifi force power up"]
186 #[inline(always)]
187 pub fn wifi_force_pu(&self) -> WIFI_FORCE_PU_R {
188 WIFI_FORCE_PU_R::new(((self.bits >> 18) & 1) != 0)
189 }
190 #[doc = "Bit 19 - digital core force power down"]
191 #[inline(always)]
192 pub fn dg_wrap_force_pd(&self) -> DG_WRAP_FORCE_PD_R {
193 DG_WRAP_FORCE_PD_R::new(((self.bits >> 19) & 1) != 0)
194 }
195 #[doc = "Bit 20 - digital core force power up"]
196 #[inline(always)]
197 pub fn dg_wrap_force_pu(&self) -> DG_WRAP_FORCE_PU_R {
198 DG_WRAP_FORCE_PU_R::new(((self.bits >> 20) & 1) != 0)
199 }
200 #[doc = "Bit 24 - enable power down ROM in sleep"]
201 #[inline(always)]
202 pub fn rom0_pd_en(&self) -> ROM0_PD_EN_R {
203 ROM0_PD_EN_R::new(((self.bits >> 24) & 1) != 0)
204 }
205 #[doc = "Bit 25 - enable power down internal SRAM 0 in sleep"]
206 #[inline(always)]
207 pub fn inter_ram0_pd_en(&self) -> INTER_RAM0_PD_EN_R {
208 INTER_RAM0_PD_EN_R::new(((self.bits >> 25) & 1) != 0)
209 }
210 #[doc = "Bit 26 - enable power down internal SRAM 1 in sleep"]
211 #[inline(always)]
212 pub fn inter_ram1_pd_en(&self) -> INTER_RAM1_PD_EN_R {
213 INTER_RAM1_PD_EN_R::new(((self.bits >> 26) & 1) != 0)
214 }
215 #[doc = "Bit 27 - enable power down internal SRAM 2 in sleep"]
216 #[inline(always)]
217 pub fn inter_ram2_pd_en(&self) -> INTER_RAM2_PD_EN_R {
218 INTER_RAM2_PD_EN_R::new(((self.bits >> 27) & 1) != 0)
219 }
220 #[doc = "Bit 28 - enable power down internal SRAM 3 in sleep"]
221 #[inline(always)]
222 pub fn inter_ram3_pd_en(&self) -> INTER_RAM3_PD_EN_R {
223 INTER_RAM3_PD_EN_R::new(((self.bits >> 28) & 1) != 0)
224 }
225 #[doc = "Bit 29 - enable power down internal SRAM 4 in sleep"]
226 #[inline(always)]
227 pub fn inter_ram4_pd_en(&self) -> INTER_RAM4_PD_EN_R {
228 INTER_RAM4_PD_EN_R::new(((self.bits >> 29) & 1) != 0)
229 }
230 #[doc = "Bit 30 - enable power down wifi in sleep"]
231 #[inline(always)]
232 pub fn wifi_pd_en(&self) -> WIFI_PD_EN_R {
233 WIFI_PD_EN_R::new(((self.bits >> 30) & 1) != 0)
234 }
235 #[doc = "Bit 31 - enable power down digital core in sleep"]
236 #[inline(always)]
237 pub fn dg_wrap_pd_en(&self) -> DG_WRAP_PD_EN_R {
238 DG_WRAP_PD_EN_R::new(((self.bits >> 31) & 1) != 0)
239 }
240}
241#[cfg(feature = "impl-register-debug")]
242impl core::fmt::Debug for R {
243 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
244 f.debug_struct("DIG_PWC")
245 .field("lslp_mem_force_pd", &self.lslp_mem_force_pd())
246 .field("lslp_mem_force_pu", &self.lslp_mem_force_pu())
247 .field("rom0_force_pd", &self.rom0_force_pd())
248 .field("rom0_force_pu", &self.rom0_force_pu())
249 .field("inter_ram0_force_pd", &self.inter_ram0_force_pd())
250 .field("inter_ram0_force_pu", &self.inter_ram0_force_pu())
251 .field("inter_ram1_force_pd", &self.inter_ram1_force_pd())
252 .field("inter_ram1_force_pu", &self.inter_ram1_force_pu())
253 .field("inter_ram2_force_pd", &self.inter_ram2_force_pd())
254 .field("inter_ram2_force_pu", &self.inter_ram2_force_pu())
255 .field("inter_ram3_force_pd", &self.inter_ram3_force_pd())
256 .field("inter_ram3_force_pu", &self.inter_ram3_force_pu())
257 .field("inter_ram4_force_pd", &self.inter_ram4_force_pd())
258 .field("inter_ram4_force_pu", &self.inter_ram4_force_pu())
259 .field("wifi_force_pd", &self.wifi_force_pd())
260 .field("wifi_force_pu", &self.wifi_force_pu())
261 .field("dg_wrap_force_pd", &self.dg_wrap_force_pd())
262 .field("dg_wrap_force_pu", &self.dg_wrap_force_pu())
263 .field("rom0_pd_en", &self.rom0_pd_en())
264 .field("inter_ram0_pd_en", &self.inter_ram0_pd_en())
265 .field("inter_ram1_pd_en", &self.inter_ram1_pd_en())
266 .field("inter_ram2_pd_en", &self.inter_ram2_pd_en())
267 .field("inter_ram3_pd_en", &self.inter_ram3_pd_en())
268 .field("inter_ram4_pd_en", &self.inter_ram4_pd_en())
269 .field("wifi_pd_en", &self.wifi_pd_en())
270 .field("dg_wrap_pd_en", &self.dg_wrap_pd_en())
271 .finish()
272 }
273}
274impl W {
275 #[doc = "Bit 3 - memories in digital core force PD in sleep"]
276 #[inline(always)]
277 pub fn lslp_mem_force_pd(&mut self) -> LSLP_MEM_FORCE_PD_W<DIG_PWC_SPEC> {
278 LSLP_MEM_FORCE_PD_W::new(self, 3)
279 }
280 #[doc = "Bit 4 - memories in digital core force no PD in sleep"]
281 #[inline(always)]
282 pub fn lslp_mem_force_pu(&mut self) -> LSLP_MEM_FORCE_PU_W<DIG_PWC_SPEC> {
283 LSLP_MEM_FORCE_PU_W::new(self, 4)
284 }
285 #[doc = "Bit 5 - ROM force power down"]
286 #[inline(always)]
287 pub fn rom0_force_pd(&mut self) -> ROM0_FORCE_PD_W<DIG_PWC_SPEC> {
288 ROM0_FORCE_PD_W::new(self, 5)
289 }
290 #[doc = "Bit 6 - ROM force power up"]
291 #[inline(always)]
292 pub fn rom0_force_pu(&mut self) -> ROM0_FORCE_PU_W<DIG_PWC_SPEC> {
293 ROM0_FORCE_PU_W::new(self, 6)
294 }
295 #[doc = "Bit 7 - internal SRAM 0 force power down"]
296 #[inline(always)]
297 pub fn inter_ram0_force_pd(&mut self) -> INTER_RAM0_FORCE_PD_W<DIG_PWC_SPEC> {
298 INTER_RAM0_FORCE_PD_W::new(self, 7)
299 }
300 #[doc = "Bit 8 - internal SRAM 0 force power up"]
301 #[inline(always)]
302 pub fn inter_ram0_force_pu(&mut self) -> INTER_RAM0_FORCE_PU_W<DIG_PWC_SPEC> {
303 INTER_RAM0_FORCE_PU_W::new(self, 8)
304 }
305 #[doc = "Bit 9 - internal SRAM 1 force power down"]
306 #[inline(always)]
307 pub fn inter_ram1_force_pd(&mut self) -> INTER_RAM1_FORCE_PD_W<DIG_PWC_SPEC> {
308 INTER_RAM1_FORCE_PD_W::new(self, 9)
309 }
310 #[doc = "Bit 10 - internal SRAM 1 force power up"]
311 #[inline(always)]
312 pub fn inter_ram1_force_pu(&mut self) -> INTER_RAM1_FORCE_PU_W<DIG_PWC_SPEC> {
313 INTER_RAM1_FORCE_PU_W::new(self, 10)
314 }
315 #[doc = "Bit 11 - internal SRAM 2 force power down"]
316 #[inline(always)]
317 pub fn inter_ram2_force_pd(&mut self) -> INTER_RAM2_FORCE_PD_W<DIG_PWC_SPEC> {
318 INTER_RAM2_FORCE_PD_W::new(self, 11)
319 }
320 #[doc = "Bit 12 - internal SRAM 2 force power up"]
321 #[inline(always)]
322 pub fn inter_ram2_force_pu(&mut self) -> INTER_RAM2_FORCE_PU_W<DIG_PWC_SPEC> {
323 INTER_RAM2_FORCE_PU_W::new(self, 12)
324 }
325 #[doc = "Bit 13 - internal SRAM 3 force power down"]
326 #[inline(always)]
327 pub fn inter_ram3_force_pd(&mut self) -> INTER_RAM3_FORCE_PD_W<DIG_PWC_SPEC> {
328 INTER_RAM3_FORCE_PD_W::new(self, 13)
329 }
330 #[doc = "Bit 14 - internal SRAM 3 force power up"]
331 #[inline(always)]
332 pub fn inter_ram3_force_pu(&mut self) -> INTER_RAM3_FORCE_PU_W<DIG_PWC_SPEC> {
333 INTER_RAM3_FORCE_PU_W::new(self, 14)
334 }
335 #[doc = "Bit 15 - internal SRAM 4 force power down"]
336 #[inline(always)]
337 pub fn inter_ram4_force_pd(&mut self) -> INTER_RAM4_FORCE_PD_W<DIG_PWC_SPEC> {
338 INTER_RAM4_FORCE_PD_W::new(self, 15)
339 }
340 #[doc = "Bit 16 - internal SRAM 4 force power up"]
341 #[inline(always)]
342 pub fn inter_ram4_force_pu(&mut self) -> INTER_RAM4_FORCE_PU_W<DIG_PWC_SPEC> {
343 INTER_RAM4_FORCE_PU_W::new(self, 16)
344 }
345 #[doc = "Bit 17 - wifi force power down"]
346 #[inline(always)]
347 pub fn wifi_force_pd(&mut self) -> WIFI_FORCE_PD_W<DIG_PWC_SPEC> {
348 WIFI_FORCE_PD_W::new(self, 17)
349 }
350 #[doc = "Bit 18 - wifi force power up"]
351 #[inline(always)]
352 pub fn wifi_force_pu(&mut self) -> WIFI_FORCE_PU_W<DIG_PWC_SPEC> {
353 WIFI_FORCE_PU_W::new(self, 18)
354 }
355 #[doc = "Bit 19 - digital core force power down"]
356 #[inline(always)]
357 pub fn dg_wrap_force_pd(&mut self) -> DG_WRAP_FORCE_PD_W<DIG_PWC_SPEC> {
358 DG_WRAP_FORCE_PD_W::new(self, 19)
359 }
360 #[doc = "Bit 20 - digital core force power up"]
361 #[inline(always)]
362 pub fn dg_wrap_force_pu(&mut self) -> DG_WRAP_FORCE_PU_W<DIG_PWC_SPEC> {
363 DG_WRAP_FORCE_PU_W::new(self, 20)
364 }
365 #[doc = "Bit 24 - enable power down ROM in sleep"]
366 #[inline(always)]
367 pub fn rom0_pd_en(&mut self) -> ROM0_PD_EN_W<DIG_PWC_SPEC> {
368 ROM0_PD_EN_W::new(self, 24)
369 }
370 #[doc = "Bit 25 - enable power down internal SRAM 0 in sleep"]
371 #[inline(always)]
372 pub fn inter_ram0_pd_en(&mut self) -> INTER_RAM0_PD_EN_W<DIG_PWC_SPEC> {
373 INTER_RAM0_PD_EN_W::new(self, 25)
374 }
375 #[doc = "Bit 26 - enable power down internal SRAM 1 in sleep"]
376 #[inline(always)]
377 pub fn inter_ram1_pd_en(&mut self) -> INTER_RAM1_PD_EN_W<DIG_PWC_SPEC> {
378 INTER_RAM1_PD_EN_W::new(self, 26)
379 }
380 #[doc = "Bit 27 - enable power down internal SRAM 2 in sleep"]
381 #[inline(always)]
382 pub fn inter_ram2_pd_en(&mut self) -> INTER_RAM2_PD_EN_W<DIG_PWC_SPEC> {
383 INTER_RAM2_PD_EN_W::new(self, 27)
384 }
385 #[doc = "Bit 28 - enable power down internal SRAM 3 in sleep"]
386 #[inline(always)]
387 pub fn inter_ram3_pd_en(&mut self) -> INTER_RAM3_PD_EN_W<DIG_PWC_SPEC> {
388 INTER_RAM3_PD_EN_W::new(self, 28)
389 }
390 #[doc = "Bit 29 - enable power down internal SRAM 4 in sleep"]
391 #[inline(always)]
392 pub fn inter_ram4_pd_en(&mut self) -> INTER_RAM4_PD_EN_W<DIG_PWC_SPEC> {
393 INTER_RAM4_PD_EN_W::new(self, 29)
394 }
395 #[doc = "Bit 30 - enable power down wifi in sleep"]
396 #[inline(always)]
397 pub fn wifi_pd_en(&mut self) -> WIFI_PD_EN_W<DIG_PWC_SPEC> {
398 WIFI_PD_EN_W::new(self, 30)
399 }
400 #[doc = "Bit 31 - enable power down digital core in sleep"]
401 #[inline(always)]
402 pub fn dg_wrap_pd_en(&mut self) -> DG_WRAP_PD_EN_W<DIG_PWC_SPEC> {
403 DG_WRAP_PD_EN_W::new(self, 31)
404 }
405}
406#[doc = "\n\nYou can [`read`](crate::Reg::read) this register and get [`dig_pwc::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dig_pwc::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
407pub struct DIG_PWC_SPEC;
408impl crate::RegisterSpec for DIG_PWC_SPEC {
409 type Ux = u32;
410}
411#[doc = "`read()` method returns [`dig_pwc::R`](R) reader structure"]
412impl crate::Readable for DIG_PWC_SPEC {}
413#[doc = "`write(|w| ..)` method takes [`dig_pwc::W`](W) writer structure"]
414impl crate::Writable for DIG_PWC_SPEC {
415 type Safety = crate::Unsafe;
416}
417#[doc = "`reset()` method sets DIG_PWC to value 0x0015_5550"]
418impl crate::Resettable for DIG_PWC_SPEC {
419 const RESET_VALUE: u32 = 0x0015_5550;
420}