esp32/ledc/lsch/
conf0.rs

1#[doc = "Register `CONF0` reader"]
2pub type R = crate::R<CONF0_SPEC>;
3#[doc = "Register `CONF0` writer"]
4pub type W = crate::W<CONF0_SPEC>;
5#[doc = "Field `TIMER_SEL` reader - There are four low speed timers the two bits are used to select one of them for low speed channel0. 2'b00: seletc lstimer0. 2'b01: select lstimer1. 2'b10: select lstimer2. 2'b11: select lstimer3."]
6pub type TIMER_SEL_R = crate::FieldReader;
7#[doc = "Field `TIMER_SEL` writer - There are four low speed timers the two bits are used to select one of them for low speed channel0. 2'b00: seletc lstimer0. 2'b01: select lstimer1. 2'b10: select lstimer2. 2'b11: select lstimer3."]
8pub type TIMER_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 2>;
9#[doc = "Field `SIG_OUT_EN` reader - This is the output enable control bit for low speed channel0."]
10pub type SIG_OUT_EN_R = crate::BitReader;
11#[doc = "Field `SIG_OUT_EN` writer - This is the output enable control bit for low speed channel0."]
12pub type SIG_OUT_EN_W<'a, REG> = crate::BitWriter<'a, REG>;
13#[doc = "Field `IDLE_LV` reader - This bit is used to control the output value when low speed channel0 is off."]
14pub type IDLE_LV_R = crate::BitReader;
15#[doc = "Field `IDLE_LV` writer - This bit is used to control the output value when low speed channel0 is off."]
16pub type IDLE_LV_W<'a, REG> = crate::BitWriter<'a, REG>;
17#[doc = "Field `PARA_UP` reader - This bit is used to update register LEDC_LSCH0_HPOINT and LEDC_LSCH0_DUTY for low speed channel0."]
18pub type PARA_UP_R = crate::BitReader;
19#[doc = "Field `PARA_UP` writer - This bit is used to update register LEDC_LSCH0_HPOINT and LEDC_LSCH0_DUTY for low speed channel0."]
20pub type PARA_UP_W<'a, REG> = crate::BitWriter<'a, REG>;
21impl R {
22    #[doc = "Bits 0:1 - There are four low speed timers the two bits are used to select one of them for low speed channel0. 2'b00: seletc lstimer0. 2'b01: select lstimer1. 2'b10: select lstimer2. 2'b11: select lstimer3."]
23    #[inline(always)]
24    pub fn timer_sel(&self) -> TIMER_SEL_R {
25        TIMER_SEL_R::new((self.bits & 3) as u8)
26    }
27    #[doc = "Bit 2 - This is the output enable control bit for low speed channel0."]
28    #[inline(always)]
29    pub fn sig_out_en(&self) -> SIG_OUT_EN_R {
30        SIG_OUT_EN_R::new(((self.bits >> 2) & 1) != 0)
31    }
32    #[doc = "Bit 3 - This bit is used to control the output value when low speed channel0 is off."]
33    #[inline(always)]
34    pub fn idle_lv(&self) -> IDLE_LV_R {
35        IDLE_LV_R::new(((self.bits >> 3) & 1) != 0)
36    }
37    #[doc = "Bit 4 - This bit is used to update register LEDC_LSCH0_HPOINT and LEDC_LSCH0_DUTY for low speed channel0."]
38    #[inline(always)]
39    pub fn para_up(&self) -> PARA_UP_R {
40        PARA_UP_R::new(((self.bits >> 4) & 1) != 0)
41    }
42}
43#[cfg(feature = "impl-register-debug")]
44impl core::fmt::Debug for R {
45    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
46        f.debug_struct("CONF0")
47            .field("timer_sel", &self.timer_sel())
48            .field("sig_out_en", &self.sig_out_en())
49            .field("idle_lv", &self.idle_lv())
50            .field("para_up", &self.para_up())
51            .finish()
52    }
53}
54impl W {
55    #[doc = "Bits 0:1 - There are four low speed timers the two bits are used to select one of them for low speed channel0. 2'b00: seletc lstimer0. 2'b01: select lstimer1. 2'b10: select lstimer2. 2'b11: select lstimer3."]
56    #[inline(always)]
57    pub fn timer_sel(&mut self) -> TIMER_SEL_W<CONF0_SPEC> {
58        TIMER_SEL_W::new(self, 0)
59    }
60    #[doc = "Bit 2 - This is the output enable control bit for low speed channel0."]
61    #[inline(always)]
62    pub fn sig_out_en(&mut self) -> SIG_OUT_EN_W<CONF0_SPEC> {
63        SIG_OUT_EN_W::new(self, 2)
64    }
65    #[doc = "Bit 3 - This bit is used to control the output value when low speed channel0 is off."]
66    #[inline(always)]
67    pub fn idle_lv(&mut self) -> IDLE_LV_W<CONF0_SPEC> {
68        IDLE_LV_W::new(self, 3)
69    }
70    #[doc = "Bit 4 - This bit is used to update register LEDC_LSCH0_HPOINT and LEDC_LSCH0_DUTY for low speed channel0."]
71    #[inline(always)]
72    pub fn para_up(&mut self) -> PARA_UP_W<CONF0_SPEC> {
73        PARA_UP_W::new(self, 4)
74    }
75}
76#[doc = "\n\nYou can [`read`](crate::Reg::read) this register and get [`conf0::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`conf0::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
77pub struct CONF0_SPEC;
78impl crate::RegisterSpec for CONF0_SPEC {
79    type Ux = u32;
80}
81#[doc = "`read()` method returns [`conf0::R`](R) reader structure"]
82impl crate::Readable for CONF0_SPEC {}
83#[doc = "`write(|w| ..)` method takes [`conf0::W`](W) writer structure"]
84impl crate::Writable for CONF0_SPEC {
85    type Safety = crate::Unsafe;
86}
87#[doc = "`reset()` method sets CONF0 to value 0"]
88impl crate::Resettable for CONF0_SPEC {}
esp32/ledc/lsch/conf0.rs

esp32/ledc/lsch/
conf0.rs
