esp32/frc_timer/
timer_int.rs

1#[doc = "Register `TIMER_INT` reader"]
2pub type R = crate::R<TIMER_INT_SPEC>;
3#[doc = "Register `TIMER_INT` writer"]
4pub type W = crate::W<TIMER_INT_SPEC>;
5#[doc = "Field `CLR` reader - "]
6pub type CLR_R = crate::BitReader;
7#[doc = "Field `CLR` writer - "]
8pub type CLR_W<'a, REG> = crate::BitWriter<'a, REG>;
9impl R {
10    #[doc = "Bit 0"]
11    #[inline(always)]
12    pub fn clr(&self) -> CLR_R {
13        CLR_R::new((self.bits & 1) != 0)
14    }
15}
16#[cfg(feature = "impl-register-debug")]
17impl core::fmt::Debug for R {
18    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
19        f.debug_struct("TIMER_INT")
20            .field("clr", &self.clr())
21            .finish()
22    }
23}
24impl W {
25    #[doc = "Bit 0"]
26    #[inline(always)]
27    pub fn clr(&mut self) -> CLR_W<TIMER_INT_SPEC> {
28        CLR_W::new(self, 0)
29    }
30}
31#[doc = "\n\nYou can [`read`](crate::Reg::read) this register and get [`timer_int::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timer_int::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
32pub struct TIMER_INT_SPEC;
33impl crate::RegisterSpec for TIMER_INT_SPEC {
34    type Ux = u32;
35}
36#[doc = "`read()` method returns [`timer_int::R`](R) reader structure"]
37impl crate::Readable for TIMER_INT_SPEC {}
38#[doc = "`write(|w| ..)` method takes [`timer_int::W`](W) writer structure"]
39impl crate::Writable for TIMER_INT_SPEC {
40    type Safety = crate::Unsafe;
41}
42#[doc = "`reset()` method sets TIMER_INT to value 0"]
43impl crate::Resettable for TIMER_INT_SPEC {}
esp32/frc_timer/timer_int.rs

esp32/frc_timer/
timer_int.rs
