esp32/rtc_cntl/
bias_conf.rs

1#[doc = "Register `BIAS_CONF` reader"]
2pub type R = crate::R<BIAS_CONF_SPEC>;
3#[doc = "Register `BIAS_CONF` writer"]
4pub type W = crate::W<BIAS_CONF_SPEC>;
5#[doc = "Field `DBG_ATTEN` reader - DBG_ATTEN"]
6pub type DBG_ATTEN_R = crate::FieldReader;
7#[doc = "Field `DBG_ATTEN` writer - DBG_ATTEN"]
8pub type DBG_ATTEN_W<'a, REG> = crate::FieldWriter<'a, REG, 2>;
9#[doc = "Field `ENB_SCK_XTAL` reader - ENB_SCK_XTAL"]
10pub type ENB_SCK_XTAL_R = crate::BitReader;
11#[doc = "Field `ENB_SCK_XTAL` writer - ENB_SCK_XTAL"]
12pub type ENB_SCK_XTAL_W<'a, REG> = crate::BitWriter<'a, REG>;
13#[doc = "Field `INC_HEARTBEAT_REFRESH` reader - INC_HEARTBEAT_REFRESH"]
14pub type INC_HEARTBEAT_REFRESH_R = crate::BitReader;
15#[doc = "Field `INC_HEARTBEAT_REFRESH` writer - INC_HEARTBEAT_REFRESH"]
16pub type INC_HEARTBEAT_REFRESH_W<'a, REG> = crate::BitWriter<'a, REG>;
17#[doc = "Field `DEC_HEARTBEAT_PERIOD` reader - DEC_HEARTBEAT_PERIOD"]
18pub type DEC_HEARTBEAT_PERIOD_R = crate::BitReader;
19#[doc = "Field `DEC_HEARTBEAT_PERIOD` writer - DEC_HEARTBEAT_PERIOD"]
20pub type DEC_HEARTBEAT_PERIOD_W<'a, REG> = crate::BitWriter<'a, REG>;
21#[doc = "Field `INC_HEARTBEAT_PERIOD` reader - INC_HEARTBEAT_PERIOD"]
22pub type INC_HEARTBEAT_PERIOD_R = crate::BitReader;
23#[doc = "Field `INC_HEARTBEAT_PERIOD` writer - INC_HEARTBEAT_PERIOD"]
24pub type INC_HEARTBEAT_PERIOD_W<'a, REG> = crate::BitWriter<'a, REG>;
25#[doc = "Field `DEC_HEARTBEAT_WIDTH` reader - DEC_HEARTBEAT_WIDTH"]
26pub type DEC_HEARTBEAT_WIDTH_R = crate::BitReader;
27#[doc = "Field `DEC_HEARTBEAT_WIDTH` writer - DEC_HEARTBEAT_WIDTH"]
28pub type DEC_HEARTBEAT_WIDTH_W<'a, REG> = crate::BitWriter<'a, REG>;
29#[doc = "Field `RST_BIAS_I2C` reader - RST_BIAS_I2C"]
30pub type RST_BIAS_I2C_R = crate::BitReader;
31#[doc = "Field `RST_BIAS_I2C` writer - RST_BIAS_I2C"]
32pub type RST_BIAS_I2C_W<'a, REG> = crate::BitWriter<'a, REG>;
33impl R {
34    #[doc = "Bits 24:25 - DBG_ATTEN"]
35    #[inline(always)]
36    pub fn dbg_atten(&self) -> DBG_ATTEN_R {
37        DBG_ATTEN_R::new(((self.bits >> 24) & 3) as u8)
38    }
39    #[doc = "Bit 26 - ENB_SCK_XTAL"]
40    #[inline(always)]
41    pub fn enb_sck_xtal(&self) -> ENB_SCK_XTAL_R {
42        ENB_SCK_XTAL_R::new(((self.bits >> 26) & 1) != 0)
43    }
44    #[doc = "Bit 27 - INC_HEARTBEAT_REFRESH"]
45    #[inline(always)]
46    pub fn inc_heartbeat_refresh(&self) -> INC_HEARTBEAT_REFRESH_R {
47        INC_HEARTBEAT_REFRESH_R::new(((self.bits >> 27) & 1) != 0)
48    }
49    #[doc = "Bit 28 - DEC_HEARTBEAT_PERIOD"]
50    #[inline(always)]
51    pub fn dec_heartbeat_period(&self) -> DEC_HEARTBEAT_PERIOD_R {
52        DEC_HEARTBEAT_PERIOD_R::new(((self.bits >> 28) & 1) != 0)
53    }
54    #[doc = "Bit 29 - INC_HEARTBEAT_PERIOD"]
55    #[inline(always)]
56    pub fn inc_heartbeat_period(&self) -> INC_HEARTBEAT_PERIOD_R {
57        INC_HEARTBEAT_PERIOD_R::new(((self.bits >> 29) & 1) != 0)
58    }
59    #[doc = "Bit 30 - DEC_HEARTBEAT_WIDTH"]
60    #[inline(always)]
61    pub fn dec_heartbeat_width(&self) -> DEC_HEARTBEAT_WIDTH_R {
62        DEC_HEARTBEAT_WIDTH_R::new(((self.bits >> 30) & 1) != 0)
63    }
64    #[doc = "Bit 31 - RST_BIAS_I2C"]
65    #[inline(always)]
66    pub fn rst_bias_i2c(&self) -> RST_BIAS_I2C_R {
67        RST_BIAS_I2C_R::new(((self.bits >> 31) & 1) != 0)
68    }
69}
70#[cfg(feature = "impl-register-debug")]
71impl core::fmt::Debug for R {
72    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
73        f.debug_struct("BIAS_CONF")
74            .field("dbg_atten", &self.dbg_atten())
75            .field("enb_sck_xtal", &self.enb_sck_xtal())
76            .field("inc_heartbeat_refresh", &self.inc_heartbeat_refresh())
77            .field("dec_heartbeat_period", &self.dec_heartbeat_period())
78            .field("inc_heartbeat_period", &self.inc_heartbeat_period())
79            .field("dec_heartbeat_width", &self.dec_heartbeat_width())
80            .field("rst_bias_i2c", &self.rst_bias_i2c())
81            .finish()
82    }
83}
84impl W {
85    #[doc = "Bits 24:25 - DBG_ATTEN"]
86    #[inline(always)]
87    pub fn dbg_atten(&mut self) -> DBG_ATTEN_W<BIAS_CONF_SPEC> {
88        DBG_ATTEN_W::new(self, 24)
89    }
90    #[doc = "Bit 26 - ENB_SCK_XTAL"]
91    #[inline(always)]
92    pub fn enb_sck_xtal(&mut self) -> ENB_SCK_XTAL_W<BIAS_CONF_SPEC> {
93        ENB_SCK_XTAL_W::new(self, 26)
94    }
95    #[doc = "Bit 27 - INC_HEARTBEAT_REFRESH"]
96    #[inline(always)]
97    pub fn inc_heartbeat_refresh(&mut self) -> INC_HEARTBEAT_REFRESH_W<BIAS_CONF_SPEC> {
98        INC_HEARTBEAT_REFRESH_W::new(self, 27)
99    }
100    #[doc = "Bit 28 - DEC_HEARTBEAT_PERIOD"]
101    #[inline(always)]
102    pub fn dec_heartbeat_period(&mut self) -> DEC_HEARTBEAT_PERIOD_W<BIAS_CONF_SPEC> {
103        DEC_HEARTBEAT_PERIOD_W::new(self, 28)
104    }
105    #[doc = "Bit 29 - INC_HEARTBEAT_PERIOD"]
106    #[inline(always)]
107    pub fn inc_heartbeat_period(&mut self) -> INC_HEARTBEAT_PERIOD_W<BIAS_CONF_SPEC> {
108        INC_HEARTBEAT_PERIOD_W::new(self, 29)
109    }
110    #[doc = "Bit 30 - DEC_HEARTBEAT_WIDTH"]
111    #[inline(always)]
112    pub fn dec_heartbeat_width(&mut self) -> DEC_HEARTBEAT_WIDTH_W<BIAS_CONF_SPEC> {
113        DEC_HEARTBEAT_WIDTH_W::new(self, 30)
114    }
115    #[doc = "Bit 31 - RST_BIAS_I2C"]
116    #[inline(always)]
117    pub fn rst_bias_i2c(&mut self) -> RST_BIAS_I2C_W<BIAS_CONF_SPEC> {
118        RST_BIAS_I2C_W::new(self, 31)
119    }
120}
121#[doc = "\n\nYou can [`read`](crate::Reg::read) this register and get [`bias_conf::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`bias_conf::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
122pub struct BIAS_CONF_SPEC;
123impl crate::RegisterSpec for BIAS_CONF_SPEC {
124    type Ux = u32;
125}
126#[doc = "`read()` method returns [`bias_conf::R`](R) reader structure"]
127impl crate::Readable for BIAS_CONF_SPEC {}
128#[doc = "`write(|w| ..)` method takes [`bias_conf::W`](W) writer structure"]
129impl crate::Writable for BIAS_CONF_SPEC {
130    type Safety = crate::Unsafe;
131}
132#[doc = "`reset()` method sets BIAS_CONF to value 0"]
133impl crate::Resettable for BIAS_CONF_SPEC {}
esp32/rtc_cntl/bias_conf.rs

esp32/rtc_cntl/
bias_conf.rs
