1#[doc = "Register `CONF1` reader"]
2pub type R = crate::R<CONF1_SPEC>;
3#[doc = "Register `CONF1` writer"]
4pub type W = crate::W<CONF1_SPEC>;
5#[doc = "Field `DUTY_SCALE` reader - This register controls the increase or decrease step scale for high speed channel0."]
6pub type DUTY_SCALE_R = crate::FieldReader<u16>;
7#[doc = "Field `DUTY_SCALE` writer - This register controls the increase or decrease step scale for high speed channel0."]
8pub type DUTY_SCALE_W<'a, REG> = crate::FieldWriter<'a, REG, 10, u16>;
9#[doc = "Field `DUTY_CYCLE` reader - This register is used to increase or decrease the duty every reg_duty_cycle_hsch0 cycles for high speed channel0."]
10pub type DUTY_CYCLE_R = crate::FieldReader<u16>;
11#[doc = "Field `DUTY_CYCLE` writer - This register is used to increase or decrease the duty every reg_duty_cycle_hsch0 cycles for high speed channel0."]
12pub type DUTY_CYCLE_W<'a, REG> = crate::FieldWriter<'a, REG, 10, u16>;
13#[doc = "Field `DUTY_NUM` reader - This register is used to control the num of increased or decreased times for high speed channel0."]
14pub type DUTY_NUM_R = crate::FieldReader<u16>;
15#[doc = "Field `DUTY_NUM` writer - This register is used to control the num of increased or decreased times for high speed channel0."]
16pub type DUTY_NUM_W<'a, REG> = crate::FieldWriter<'a, REG, 10, u16>;
17#[doc = "Field `DUTY_INC` reader - This register is used to increase the duty of output signal or decrease the duty of output signal for high speed channel0."]
18pub type DUTY_INC_R = crate::BitReader;
19#[doc = "Field `DUTY_INC` writer - This register is used to increase the duty of output signal or decrease the duty of output signal for high speed channel0."]
20pub type DUTY_INC_W<'a, REG> = crate::BitWriter<'a, REG>;
21#[doc = "Field `DUTY_START` reader - When reg_duty_num_hsch0 reg_duty_cycle_hsch0 and reg_duty_scale_hsch0 has been configured. these register won't take effect until set reg_duty_start_hsch0. this bit is automatically cleared by hardware."]
22pub type DUTY_START_R = crate::BitReader;
23#[doc = "Field `DUTY_START` writer - When reg_duty_num_hsch0 reg_duty_cycle_hsch0 and reg_duty_scale_hsch0 has been configured. these register won't take effect until set reg_duty_start_hsch0. this bit is automatically cleared by hardware."]
24pub type DUTY_START_W<'a, REG> = crate::BitWriter<'a, REG>;
25impl R {
26 #[doc = "Bits 0:9 - This register controls the increase or decrease step scale for high speed channel0."]
27 #[inline(always)]
28 pub fn duty_scale(&self) -> DUTY_SCALE_R {
29 DUTY_SCALE_R::new((self.bits & 0x03ff) as u16)
30 }
31 #[doc = "Bits 10:19 - This register is used to increase or decrease the duty every reg_duty_cycle_hsch0 cycles for high speed channel0."]
32 #[inline(always)]
33 pub fn duty_cycle(&self) -> DUTY_CYCLE_R {
34 DUTY_CYCLE_R::new(((self.bits >> 10) & 0x03ff) as u16)
35 }
36 #[doc = "Bits 20:29 - This register is used to control the num of increased or decreased times for high speed channel0."]
37 #[inline(always)]
38 pub fn duty_num(&self) -> DUTY_NUM_R {
39 DUTY_NUM_R::new(((self.bits >> 20) & 0x03ff) as u16)
40 }
41 #[doc = "Bit 30 - This register is used to increase the duty of output signal or decrease the duty of output signal for high speed channel0."]
42 #[inline(always)]
43 pub fn duty_inc(&self) -> DUTY_INC_R {
44 DUTY_INC_R::new(((self.bits >> 30) & 1) != 0)
45 }
46 #[doc = "Bit 31 - When reg_duty_num_hsch0 reg_duty_cycle_hsch0 and reg_duty_scale_hsch0 has been configured. these register won't take effect until set reg_duty_start_hsch0. this bit is automatically cleared by hardware."]
47 #[inline(always)]
48 pub fn duty_start(&self) -> DUTY_START_R {
49 DUTY_START_R::new(((self.bits >> 31) & 1) != 0)
50 }
51}
52#[cfg(feature = "impl-register-debug")]
53impl core::fmt::Debug for R {
54 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
55 f.debug_struct("CONF1")
56 .field("duty_scale", &self.duty_scale())
57 .field("duty_cycle", &self.duty_cycle())
58 .field("duty_num", &self.duty_num())
59 .field("duty_inc", &self.duty_inc())
60 .field("duty_start", &self.duty_start())
61 .finish()
62 }
63}
64impl W {
65 #[doc = "Bits 0:9 - This register controls the increase or decrease step scale for high speed channel0."]
66 #[inline(always)]
67 pub fn duty_scale(&mut self) -> DUTY_SCALE_W<CONF1_SPEC> {
68 DUTY_SCALE_W::new(self, 0)
69 }
70 #[doc = "Bits 10:19 - This register is used to increase or decrease the duty every reg_duty_cycle_hsch0 cycles for high speed channel0."]
71 #[inline(always)]
72 pub fn duty_cycle(&mut self) -> DUTY_CYCLE_W<CONF1_SPEC> {
73 DUTY_CYCLE_W::new(self, 10)
74 }
75 #[doc = "Bits 20:29 - This register is used to control the num of increased or decreased times for high speed channel0."]
76 #[inline(always)]
77 pub fn duty_num(&mut self) -> DUTY_NUM_W<CONF1_SPEC> {
78 DUTY_NUM_W::new(self, 20)
79 }
80 #[doc = "Bit 30 - This register is used to increase the duty of output signal or decrease the duty of output signal for high speed channel0."]
81 #[inline(always)]
82 pub fn duty_inc(&mut self) -> DUTY_INC_W<CONF1_SPEC> {
83 DUTY_INC_W::new(self, 30)
84 }
85 #[doc = "Bit 31 - When reg_duty_num_hsch0 reg_duty_cycle_hsch0 and reg_duty_scale_hsch0 has been configured. these register won't take effect until set reg_duty_start_hsch0. this bit is automatically cleared by hardware."]
86 #[inline(always)]
87 pub fn duty_start(&mut self) -> DUTY_START_W<CONF1_SPEC> {
88 DUTY_START_W::new(self, 31)
89 }
90}
91#[doc = "\n\nYou can [`read`](crate::Reg::read) this register and get [`conf1::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`conf1::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
92pub struct CONF1_SPEC;
93impl crate::RegisterSpec for CONF1_SPEC {
94 type Ux = u32;
95}
96#[doc = "`read()` method returns [`conf1::R`](R) reader structure"]
97impl crate::Readable for CONF1_SPEC {}
98#[doc = "`write(|w| ..)` method takes [`conf1::W`](W) writer structure"]
99impl crate::Writable for CONF1_SPEC {
100 type Safety = crate::Unsafe;
101}
102#[doc = "`reset()` method sets CONF1 to value 0x4000_0000"]
103impl crate::Resettable for CONF1_SPEC {
104 const RESET_VALUE: u32 = 0x4000_0000;
105}