1#[doc = "Register `RXFIFO_ST` reader"]
2pub type R = crate::R<RXFIFO_ST_SPEC>;
3#[doc = "Field `RXFIFO_START_ADDR` reader - This is the offset address of the last receiving data as described in nonfifo_rx_thres_register."]
4pub type RXFIFO_START_ADDR_R = crate::FieldReader;
5#[doc = "Field `RXFIFO_END_ADDR` reader - This is the offset address of the first receiving data as described in nonfifo_rx_thres_register."]
6pub type RXFIFO_END_ADDR_R = crate::FieldReader;
7#[doc = "Field `TXFIFO_START_ADDR` reader - This is the offset address of the first sending data as described in nonfifo_tx_thres register."]
8pub type TXFIFO_START_ADDR_R = crate::FieldReader;
9#[doc = "Field `TXFIFO_END_ADDR` reader - This is the offset address of the last sending data as described in nonfifo_tx_thres register."]
10pub type TXFIFO_END_ADDR_R = crate::FieldReader;
11impl R {
12 #[doc = "Bits 0:4 - This is the offset address of the last receiving data as described in nonfifo_rx_thres_register."]
13 #[inline(always)]
14 pub fn rxfifo_start_addr(&self) -> RXFIFO_START_ADDR_R {
15 RXFIFO_START_ADDR_R::new((self.bits & 0x1f) as u8)
16 }
17 #[doc = "Bits 5:9 - This is the offset address of the first receiving data as described in nonfifo_rx_thres_register."]
18 #[inline(always)]
19 pub fn rxfifo_end_addr(&self) -> RXFIFO_END_ADDR_R {
20 RXFIFO_END_ADDR_R::new(((self.bits >> 5) & 0x1f) as u8)
21 }
22 #[doc = "Bits 10:14 - This is the offset address of the first sending data as described in nonfifo_tx_thres register."]
23 #[inline(always)]
24 pub fn txfifo_start_addr(&self) -> TXFIFO_START_ADDR_R {
25 TXFIFO_START_ADDR_R::new(((self.bits >> 10) & 0x1f) as u8)
26 }
27 #[doc = "Bits 15:19 - This is the offset address of the last sending data as described in nonfifo_tx_thres register."]
28 #[inline(always)]
29 pub fn txfifo_end_addr(&self) -> TXFIFO_END_ADDR_R {
30 TXFIFO_END_ADDR_R::new(((self.bits >> 15) & 0x1f) as u8)
31 }
32}
33#[cfg(feature = "impl-register-debug")]
34impl core::fmt::Debug for R {
35 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
36 f.debug_struct("RXFIFO_ST")
37 .field("rxfifo_start_addr", &self.rxfifo_start_addr())
38 .field("rxfifo_end_addr", &self.rxfifo_end_addr())
39 .field("txfifo_start_addr", &self.txfifo_start_addr())
40 .field("txfifo_end_addr", &self.txfifo_end_addr())
41 .finish()
42 }
43}
44#[doc = "\n\nYou can [`read`](crate::Reg::read) this register and get [`rxfifo_st::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
45pub struct RXFIFO_ST_SPEC;
46impl crate::RegisterSpec for RXFIFO_ST_SPEC {
47 type Ux = u32;
48}
49#[doc = "`read()` method returns [`rxfifo_st::R`](R) reader structure"]
50impl crate::Readable for RXFIFO_ST_SPEC {}
51#[doc = "`reset()` method sets RXFIFO_ST to value 0"]
52impl crate::Resettable for RXFIFO_ST_SPEC {}