esp32/i2c0/
fifo_conf.rs

1#[doc = "Register `FIFO_CONF` reader"]
2pub type R = crate::R<FIFO_CONF_SPEC>;
3#[doc = "Register `FIFO_CONF` writer"]
4pub type W = crate::W<FIFO_CONF_SPEC>;
5#[doc = "Field `RXFIFO_FULL_THRHD` reader - "]
6pub type RXFIFO_FULL_THRHD_R = crate::FieldReader;
7#[doc = "Field `RXFIFO_FULL_THRHD` writer - "]
8pub type RXFIFO_FULL_THRHD_W<'a, REG> = crate::FieldWriter<'a, REG, 5>;
9#[doc = "Field `TXFIFO_EMPTY_THRHD` reader - Config txfifo empty threhd value when using apb fifo access"]
10pub type TXFIFO_EMPTY_THRHD_R = crate::FieldReader;
11#[doc = "Field `TXFIFO_EMPTY_THRHD` writer - Config txfifo empty threhd value when using apb fifo access"]
12pub type TXFIFO_EMPTY_THRHD_W<'a, REG> = crate::FieldWriter<'a, REG, 5>;
13#[doc = "Field `NONFIFO_EN` reader - Set this bit to enble apb nonfifo access."]
14pub type NONFIFO_EN_R = crate::BitReader;
15#[doc = "Field `NONFIFO_EN` writer - Set this bit to enble apb nonfifo access."]
16pub type NONFIFO_EN_W<'a, REG> = crate::BitWriter<'a, REG>;
17#[doc = "Field `FIFO_ADDR_CFG_EN` reader - When this bit is set to 1 then the byte after address represent the offset address of I2C Slave's ram."]
18pub type FIFO_ADDR_CFG_EN_R = crate::BitReader;
19#[doc = "Field `FIFO_ADDR_CFG_EN` writer - When this bit is set to 1 then the byte after address represent the offset address of I2C Slave's ram."]
20pub type FIFO_ADDR_CFG_EN_W<'a, REG> = crate::BitWriter<'a, REG>;
21#[doc = "Field `RX_FIFO_RST` reader - Set this bit to reset rx fifo when using apb fifo access."]
22pub type RX_FIFO_RST_R = crate::BitReader;
23#[doc = "Field `RX_FIFO_RST` writer - Set this bit to reset rx fifo when using apb fifo access."]
24pub type RX_FIFO_RST_W<'a, REG> = crate::BitWriter<'a, REG>;
25#[doc = "Field `TX_FIFO_RST` reader - Set this bit to reset tx fifo when using apb fifo access."]
26pub type TX_FIFO_RST_R = crate::BitReader;
27#[doc = "Field `TX_FIFO_RST` writer - Set this bit to reset tx fifo when using apb fifo access."]
28pub type TX_FIFO_RST_W<'a, REG> = crate::BitWriter<'a, REG>;
29#[doc = "Field `NONFIFO_RX_THRES` reader - when I2C receives more than nonfifo_rx_thres data it will produce rx_send_full_int_raw interrupt and update the current offset address of the receiving data."]
30pub type NONFIFO_RX_THRES_R = crate::FieldReader;
31#[doc = "Field `NONFIFO_RX_THRES` writer - when I2C receives more than nonfifo_rx_thres data it will produce rx_send_full_int_raw interrupt and update the current offset address of the receiving data."]
32pub type NONFIFO_RX_THRES_W<'a, REG> = crate::FieldWriter<'a, REG, 6>;
33#[doc = "Field `NONFIFO_TX_THRES` reader - when I2C sends more than nonfifo_tx_thres data it will produce tx_send_empty_int_raw interrupt and update the current offset address of the sending data."]
34pub type NONFIFO_TX_THRES_R = crate::FieldReader;
35#[doc = "Field `NONFIFO_TX_THRES` writer - when I2C sends more than nonfifo_tx_thres data it will produce tx_send_empty_int_raw interrupt and update the current offset address of the sending data."]
36pub type NONFIFO_TX_THRES_W<'a, REG> = crate::FieldWriter<'a, REG, 6>;
37impl R {
38    #[doc = "Bits 0:4"]
39    #[inline(always)]
40    pub fn rxfifo_full_thrhd(&self) -> RXFIFO_FULL_THRHD_R {
41        RXFIFO_FULL_THRHD_R::new((self.bits & 0x1f) as u8)
42    }
43    #[doc = "Bits 5:9 - Config txfifo empty threhd value when using apb fifo access"]
44    #[inline(always)]
45    pub fn txfifo_empty_thrhd(&self) -> TXFIFO_EMPTY_THRHD_R {
46        TXFIFO_EMPTY_THRHD_R::new(((self.bits >> 5) & 0x1f) as u8)
47    }
48    #[doc = "Bit 10 - Set this bit to enble apb nonfifo access."]
49    #[inline(always)]
50    pub fn nonfifo_en(&self) -> NONFIFO_EN_R {
51        NONFIFO_EN_R::new(((self.bits >> 10) & 1) != 0)
52    }
53    #[doc = "Bit 11 - When this bit is set to 1 then the byte after address represent the offset address of I2C Slave's ram."]
54    #[inline(always)]
55    pub fn fifo_addr_cfg_en(&self) -> FIFO_ADDR_CFG_EN_R {
56        FIFO_ADDR_CFG_EN_R::new(((self.bits >> 11) & 1) != 0)
57    }
58    #[doc = "Bit 12 - Set this bit to reset rx fifo when using apb fifo access."]
59    #[inline(always)]
60    pub fn rx_fifo_rst(&self) -> RX_FIFO_RST_R {
61        RX_FIFO_RST_R::new(((self.bits >> 12) & 1) != 0)
62    }
63    #[doc = "Bit 13 - Set this bit to reset tx fifo when using apb fifo access."]
64    #[inline(always)]
65    pub fn tx_fifo_rst(&self) -> TX_FIFO_RST_R {
66        TX_FIFO_RST_R::new(((self.bits >> 13) & 1) != 0)
67    }
68    #[doc = "Bits 14:19 - when I2C receives more than nonfifo_rx_thres data it will produce rx_send_full_int_raw interrupt and update the current offset address of the receiving data."]
69    #[inline(always)]
70    pub fn nonfifo_rx_thres(&self) -> NONFIFO_RX_THRES_R {
71        NONFIFO_RX_THRES_R::new(((self.bits >> 14) & 0x3f) as u8)
72    }
73    #[doc = "Bits 20:25 - when I2C sends more than nonfifo_tx_thres data it will produce tx_send_empty_int_raw interrupt and update the current offset address of the sending data."]
74    #[inline(always)]
75    pub fn nonfifo_tx_thres(&self) -> NONFIFO_TX_THRES_R {
76        NONFIFO_TX_THRES_R::new(((self.bits >> 20) & 0x3f) as u8)
77    }
78}
79#[cfg(feature = "impl-register-debug")]
80impl core::fmt::Debug for R {
81    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
82        f.debug_struct("FIFO_CONF")
83            .field("rxfifo_full_thrhd", &self.rxfifo_full_thrhd())
84            .field("txfifo_empty_thrhd", &self.txfifo_empty_thrhd())
85            .field("nonfifo_en", &self.nonfifo_en())
86            .field("fifo_addr_cfg_en", &self.fifo_addr_cfg_en())
87            .field("rx_fifo_rst", &self.rx_fifo_rst())
88            .field("tx_fifo_rst", &self.tx_fifo_rst())
89            .field("nonfifo_rx_thres", &self.nonfifo_rx_thres())
90            .field("nonfifo_tx_thres", &self.nonfifo_tx_thres())
91            .finish()
92    }
93}
94impl W {
95    #[doc = "Bits 0:4"]
96    #[inline(always)]
97    pub fn rxfifo_full_thrhd(&mut self) -> RXFIFO_FULL_THRHD_W<FIFO_CONF_SPEC> {
98        RXFIFO_FULL_THRHD_W::new(self, 0)
99    }
100    #[doc = "Bits 5:9 - Config txfifo empty threhd value when using apb fifo access"]
101    #[inline(always)]
102    pub fn txfifo_empty_thrhd(&mut self) -> TXFIFO_EMPTY_THRHD_W<FIFO_CONF_SPEC> {
103        TXFIFO_EMPTY_THRHD_W::new(self, 5)
104    }
105    #[doc = "Bit 10 - Set this bit to enble apb nonfifo access."]
106    #[inline(always)]
107    pub fn nonfifo_en(&mut self) -> NONFIFO_EN_W<FIFO_CONF_SPEC> {
108        NONFIFO_EN_W::new(self, 10)
109    }
110    #[doc = "Bit 11 - When this bit is set to 1 then the byte after address represent the offset address of I2C Slave's ram."]
111    #[inline(always)]
112    pub fn fifo_addr_cfg_en(&mut self) -> FIFO_ADDR_CFG_EN_W<FIFO_CONF_SPEC> {
113        FIFO_ADDR_CFG_EN_W::new(self, 11)
114    }
115    #[doc = "Bit 12 - Set this bit to reset rx fifo when using apb fifo access."]
116    #[inline(always)]
117    pub fn rx_fifo_rst(&mut self) -> RX_FIFO_RST_W<FIFO_CONF_SPEC> {
118        RX_FIFO_RST_W::new(self, 12)
119    }
120    #[doc = "Bit 13 - Set this bit to reset tx fifo when using apb fifo access."]
121    #[inline(always)]
122    pub fn tx_fifo_rst(&mut self) -> TX_FIFO_RST_W<FIFO_CONF_SPEC> {
123        TX_FIFO_RST_W::new(self, 13)
124    }
125    #[doc = "Bits 14:19 - when I2C receives more than nonfifo_rx_thres data it will produce rx_send_full_int_raw interrupt and update the current offset address of the receiving data."]
126    #[inline(always)]
127    pub fn nonfifo_rx_thres(&mut self) -> NONFIFO_RX_THRES_W<FIFO_CONF_SPEC> {
128        NONFIFO_RX_THRES_W::new(self, 14)
129    }
130    #[doc = "Bits 20:25 - when I2C sends more than nonfifo_tx_thres data it will produce tx_send_empty_int_raw interrupt and update the current offset address of the sending data."]
131    #[inline(always)]
132    pub fn nonfifo_tx_thres(&mut self) -> NONFIFO_TX_THRES_W<FIFO_CONF_SPEC> {
133        NONFIFO_TX_THRES_W::new(self, 20)
134    }
135}
136#[doc = "\n\nYou can [`read`](crate::Reg::read) this register and get [`fifo_conf::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`fifo_conf::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
137pub struct FIFO_CONF_SPEC;
138impl crate::RegisterSpec for FIFO_CONF_SPEC {
139    type Ux = u32;
140}
141#[doc = "`read()` method returns [`fifo_conf::R`](R) reader structure"]
142impl crate::Readable for FIFO_CONF_SPEC {}
143#[doc = "`write(|w| ..)` method takes [`fifo_conf::W`](W) writer structure"]
144impl crate::Writable for FIFO_CONF_SPEC {
145    type Safety = crate::Unsafe;
146}
147#[doc = "`reset()` method sets FIFO_CONF to value 0x0155_408b"]
148impl crate::Resettable for FIFO_CONF_SPEC {
149    const RESET_VALUE: u32 = 0x0155_408b;
150}