esp32/emac_mac/
emacaddr5high.rs

1#[doc = "Register `EMACADDR5HIGH` reader"]
2pub type R = crate::R<EMACADDR5HIGH_SPEC>;
3#[doc = "Register `EMACADDR5HIGH` writer"]
4pub type W = crate::W<EMACADDR5HIGH_SPEC>;
5#[doc = "Field `MAC_ADDRESS5_HI` reader - This field contains the upper 16 bits Bits\\[47:32\\] of the sixth 6-byte MAC address."]
6pub type MAC_ADDRESS5_HI_R = crate::FieldReader<u16>;
7#[doc = "Field `MAC_ADDRESS5_HI` writer - This field contains the upper 16 bits Bits\\[47:32\\] of the sixth 6-byte MAC address."]
8pub type MAC_ADDRESS5_HI_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>;
9#[doc = "Field `MASK_BYTE_CONTROL5` reader - These bits are mask control bits for comparison of each of the EMACADDR5 bytes. When set high the MAC does not compare the corresponding byte of received DA or SA with the contents of EMACADDR5 registers. Each bit controls the masking of the bytes as follows: Bit\\[29\\]: EMACADDR5 High \\[15:8\\]. Bit\\[28\\]: EMACADDR5 High \\[7:0\\]. Bit\\[27\\]: EMACADDR5 Low \\[31:24\\]. Bit\\[24\\]: EMACADDR5 Low \\[7:0\\].You can filter a group of addresses (known as group address filtering) by masking one or more bytes of the address."]
10pub type MASK_BYTE_CONTROL5_R = crate::FieldReader;
11#[doc = "Field `MASK_BYTE_CONTROL5` writer - These bits are mask control bits for comparison of each of the EMACADDR5 bytes. When set high the MAC does not compare the corresponding byte of received DA or SA with the contents of EMACADDR5 registers. Each bit controls the masking of the bytes as follows: Bit\\[29\\]: EMACADDR5 High \\[15:8\\]. Bit\\[28\\]: EMACADDR5 High \\[7:0\\]. Bit\\[27\\]: EMACADDR5 Low \\[31:24\\]. Bit\\[24\\]: EMACADDR5 Low \\[7:0\\].You can filter a group of addresses (known as group address filtering) by masking one or more bytes of the address."]
12pub type MASK_BYTE_CONTROL5_W<'a, REG> = crate::FieldWriter<'a, REG, 6>;
13#[doc = "Field `SOURCE_ADDRESS5` reader - When this bit is set the EMACADDR5\\[47:0\\] is used to compare with the SA fields of the received frame. When this bit is reset the EMACADDR5\\[47:0\\] is used to compare with the DA fields of the received frame."]
14pub type SOURCE_ADDRESS5_R = crate::BitReader;
15#[doc = "Field `SOURCE_ADDRESS5` writer - When this bit is set the EMACADDR5\\[47:0\\] is used to compare with the SA fields of the received frame. When this bit is reset the EMACADDR5\\[47:0\\] is used to compare with the DA fields of the received frame."]
16pub type SOURCE_ADDRESS5_W<'a, REG> = crate::BitWriter<'a, REG>;
17#[doc = "Field `ADDRESS_ENABLE5` reader - When this bit is set the address filter module uses the sixth MAC address for perfect filtering. When this bit is reset the address filter module ignores the address for filtering."]
18pub type ADDRESS_ENABLE5_R = crate::BitReader;
19#[doc = "Field `ADDRESS_ENABLE5` writer - When this bit is set the address filter module uses the sixth MAC address for perfect filtering. When this bit is reset the address filter module ignores the address for filtering."]
20pub type ADDRESS_ENABLE5_W<'a, REG> = crate::BitWriter<'a, REG>;
21impl R {
22    #[doc = "Bits 0:15 - This field contains the upper 16 bits Bits\\[47:32\\] of the sixth 6-byte MAC address."]
23    #[inline(always)]
24    pub fn mac_address5_hi(&self) -> MAC_ADDRESS5_HI_R {
25        MAC_ADDRESS5_HI_R::new((self.bits & 0xffff) as u16)
26    }
27    #[doc = "Bits 24:29 - These bits are mask control bits for comparison of each of the EMACADDR5 bytes. When set high the MAC does not compare the corresponding byte of received DA or SA with the contents of EMACADDR5 registers. Each bit controls the masking of the bytes as follows: Bit\\[29\\]: EMACADDR5 High \\[15:8\\]. Bit\\[28\\]: EMACADDR5 High \\[7:0\\]. Bit\\[27\\]: EMACADDR5 Low \\[31:24\\]. Bit\\[24\\]: EMACADDR5 Low \\[7:0\\].You can filter a group of addresses (known as group address filtering) by masking one or more bytes of the address."]
28    #[inline(always)]
29    pub fn mask_byte_control5(&self) -> MASK_BYTE_CONTROL5_R {
30        MASK_BYTE_CONTROL5_R::new(((self.bits >> 24) & 0x3f) as u8)
31    }
32    #[doc = "Bit 30 - When this bit is set the EMACADDR5\\[47:0\\] is used to compare with the SA fields of the received frame. When this bit is reset the EMACADDR5\\[47:0\\] is used to compare with the DA fields of the received frame."]
33    #[inline(always)]
34    pub fn source_address5(&self) -> SOURCE_ADDRESS5_R {
35        SOURCE_ADDRESS5_R::new(((self.bits >> 30) & 1) != 0)
36    }
37    #[doc = "Bit 31 - When this bit is set the address filter module uses the sixth MAC address for perfect filtering. When this bit is reset the address filter module ignores the address for filtering."]
38    #[inline(always)]
39    pub fn address_enable5(&self) -> ADDRESS_ENABLE5_R {
40        ADDRESS_ENABLE5_R::new(((self.bits >> 31) & 1) != 0)
41    }
42}
43#[cfg(feature = "impl-register-debug")]
44impl core::fmt::Debug for R {
45    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
46        f.debug_struct("EMACADDR5HIGH")
47            .field("mac_address5_hi", &self.mac_address5_hi())
48            .field("mask_byte_control5", &self.mask_byte_control5())
49            .field("source_address5", &self.source_address5())
50            .field("address_enable5", &self.address_enable5())
51            .finish()
52    }
53}
54impl W {
55    #[doc = "Bits 0:15 - This field contains the upper 16 bits Bits\\[47:32\\] of the sixth 6-byte MAC address."]
56    #[inline(always)]
57    pub fn mac_address5_hi(&mut self) -> MAC_ADDRESS5_HI_W<EMACADDR5HIGH_SPEC> {
58        MAC_ADDRESS5_HI_W::new(self, 0)
59    }
60    #[doc = "Bits 24:29 - These bits are mask control bits for comparison of each of the EMACADDR5 bytes. When set high the MAC does not compare the corresponding byte of received DA or SA with the contents of EMACADDR5 registers. Each bit controls the masking of the bytes as follows: Bit\\[29\\]: EMACADDR5 High \\[15:8\\]. Bit\\[28\\]: EMACADDR5 High \\[7:0\\]. Bit\\[27\\]: EMACADDR5 Low \\[31:24\\]. Bit\\[24\\]: EMACADDR5 Low \\[7:0\\].You can filter a group of addresses (known as group address filtering) by masking one or more bytes of the address."]
61    #[inline(always)]
62    pub fn mask_byte_control5(&mut self) -> MASK_BYTE_CONTROL5_W<EMACADDR5HIGH_SPEC> {
63        MASK_BYTE_CONTROL5_W::new(self, 24)
64    }
65    #[doc = "Bit 30 - When this bit is set the EMACADDR5\\[47:0\\] is used to compare with the SA fields of the received frame. When this bit is reset the EMACADDR5\\[47:0\\] is used to compare with the DA fields of the received frame."]
66    #[inline(always)]
67    pub fn source_address5(&mut self) -> SOURCE_ADDRESS5_W<EMACADDR5HIGH_SPEC> {
68        SOURCE_ADDRESS5_W::new(self, 30)
69    }
70    #[doc = "Bit 31 - When this bit is set the address filter module uses the sixth MAC address for perfect filtering. When this bit is reset the address filter module ignores the address for filtering."]
71    #[inline(always)]
72    pub fn address_enable5(&mut self) -> ADDRESS_ENABLE5_W<EMACADDR5HIGH_SPEC> {
73        ADDRESS_ENABLE5_W::new(self, 31)
74    }
75}
76#[doc = "Upper 16 bits of the sixth 6-byte MAC address\n\nYou can [`read`](crate::Reg::read) this register and get [`emacaddr5high::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`emacaddr5high::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
77pub struct EMACADDR5HIGH_SPEC;
78impl crate::RegisterSpec for EMACADDR5HIGH_SPEC {
79    type Ux = u32;
80}
81#[doc = "`read()` method returns [`emacaddr5high::R`](R) reader structure"]
82impl crate::Readable for EMACADDR5HIGH_SPEC {}
83#[doc = "`write(|w| ..)` method takes [`emacaddr5high::W`](W) writer structure"]
84impl crate::Writable for EMACADDR5HIGH_SPEC {
85    type Safety = crate::Unsafe;
86}
87#[doc = "`reset()` method sets EMACADDR5HIGH to value 0"]
88impl crate::Resettable for EMACADDR5HIGH_SPEC {}
esp32/emac_mac/emacaddr5high.rs

esp32/emac_mac/
emacaddr5high.rs
