esp32/dport/
pro_dcache_dbug4.rs

1#[doc = "Register `PRO_DCACHE_DBUG4` reader"]
2pub type R = crate::R<PRO_DCACHE_DBUG4_SPEC>;
3#[doc = "Field `PRO_DRAM1ADDR0_IA` reader - "]
4pub type PRO_DRAM1ADDR0_IA_R = crate::FieldReader<u32>;
5impl R {
6    #[doc = "Bits 0:19"]
7    #[inline(always)]
8    pub fn pro_dram1addr0_ia(&self) -> PRO_DRAM1ADDR0_IA_R {
9        PRO_DRAM1ADDR0_IA_R::new(self.bits & 0x000f_ffff)
10    }
11}
12#[cfg(feature = "impl-register-debug")]
13impl core::fmt::Debug for R {
14    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
15        f.debug_struct("PRO_DCACHE_DBUG4")
16            .field("pro_dram1addr0_ia", &self.pro_dram1addr0_ia())
17            .finish()
18    }
19}
20#[doc = "\n\nYou can [`read`](crate::Reg::read) this register and get [`pro_dcache_dbug4::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
21pub struct PRO_DCACHE_DBUG4_SPEC;
22impl crate::RegisterSpec for PRO_DCACHE_DBUG4_SPEC {
23    type Ux = u32;
24}
25#[doc = "`read()` method returns [`pro_dcache_dbug4::R`](R) reader structure"]
26impl crate::Readable for PRO_DCACHE_DBUG4_SPEC {}
27#[doc = "`reset()` method sets PRO_DCACHE_DBUG4 to value 0"]
28impl crate::Resettable for PRO_DCACHE_DBUG4_SPEC {}
esp32/dport/pro_dcache_dbug4.rs

esp32/dport/
pro_dcache_dbug4.rs
