1#[doc = "Register `EMACCONFIG` reader"]
2pub type R = crate::R<EMACCONFIG_SPEC>;
3#[doc = "Register `EMACCONFIG` writer"]
4pub type W = crate::W<EMACCONFIG_SPEC>;
5#[doc = "Field `PLTF` reader - These bits control the number of preamble bytes that are added to the beginning of every Transmit frame. The preamble reduction occurs only when the MAC is operating in the full-duplex mode.2'b00: 7 bytes of preamble. 2'b01: 5 bytes of preamble. 2'b10: 3 bytes of preamble."]
6pub type PLTF_R = crate::FieldReader;
7#[doc = "Field `PLTF` writer - These bits control the number of preamble bytes that are added to the beginning of every Transmit frame. The preamble reduction occurs only when the MAC is operating in the full-duplex mode.2'b00: 7 bytes of preamble. 2'b01: 5 bytes of preamble. 2'b10: 3 bytes of preamble."]
8pub type PLTF_W<'a, REG> = crate::FieldWriter<'a, REG, 2>;
9#[doc = "Field `RX` reader - When this bit is set the receiver state machine of the MAC is enabled for receiving frames from the MII. When this bit is reset the MAC receive state machine is disabled after the completion of the reception of the current frame and does not receive any further frames from the MII."]
10pub type RX_R = crate::BitReader;
11#[doc = "Field `RX` writer - When this bit is set the receiver state machine of the MAC is enabled for receiving frames from the MII. When this bit is reset the MAC receive state machine is disabled after the completion of the reception of the current frame and does not receive any further frames from the MII."]
12pub type RX_W<'a, REG> = crate::BitWriter<'a, REG>;
13#[doc = "Field `TX` reader - When this bit is set the transmit state machine of the MAC is enabled for transmission on the MII. When this bit is reset the MAC transmit state machine is disabled after the completion of the transmission of the current frame and does not transmit any further frames."]
14pub type TX_R = crate::BitReader;
15#[doc = "Field `TX` writer - When this bit is set the transmit state machine of the MAC is enabled for transmission on the MII. When this bit is reset the MAC transmit state machine is disabled after the completion of the transmission of the current frame and does not transmit any further frames."]
16pub type TX_W<'a, REG> = crate::BitWriter<'a, REG>;
17#[doc = "Field `DEFERRALCHECK` reader - Deferral Check."]
18pub type DEFERRALCHECK_R = crate::BitReader;
19#[doc = "Field `DEFERRALCHECK` writer - Deferral Check."]
20pub type DEFERRALCHECK_W<'a, REG> = crate::BitWriter<'a, REG>;
21#[doc = "Field `BACKOFFLIMIT` reader - The Back-Off limit determines the random integer number (r) of slot time delays (512 bit times for 10/100 Mbps) for which the MAC waits before rescheduling a transmission attempt during retries after a collision. This bit is applicable only in the half-duplex mode. 00: k= min (n 10). 01: k = min (n 8). 10: k = min (n 4). 11: k = min (n 1) n = retransmission attempt. The random integer r takes the value in the Range 0 ~ 2000."]
22pub type BACKOFFLIMIT_R = crate::FieldReader;
23#[doc = "Field `BACKOFFLIMIT` writer - The Back-Off limit determines the random integer number (r) of slot time delays (512 bit times for 10/100 Mbps) for which the MAC waits before rescheduling a transmission attempt during retries after a collision. This bit is applicable only in the half-duplex mode. 00: k= min (n 10). 01: k = min (n 8). 10: k = min (n 4). 11: k = min (n 1) n = retransmission attempt. The random integer r takes the value in the Range 0 ~ 2000."]
24pub type BACKOFFLIMIT_W<'a, REG> = crate::FieldWriter<'a, REG, 2>;
25#[doc = "Field `PADCRCSTRIP` reader - When this bit is set the MAC strips the Pad or FCS field on the incoming frames only if the value of the length field is less than 1 536 bytes. All received frames with length field greater than or equal to 1 536 bytes are passed to the application without stripping the Pad or FCS field. When this bit is reset the MAC passes all incoming frames without modifying them to the Host."]
26pub type PADCRCSTRIP_R = crate::BitReader;
27#[doc = "Field `PADCRCSTRIP` writer - When this bit is set the MAC strips the Pad or FCS field on the incoming frames only if the value of the length field is less than 1 536 bytes. All received frames with length field greater than or equal to 1 536 bytes are passed to the application without stripping the Pad or FCS field. When this bit is reset the MAC passes all incoming frames without modifying them to the Host."]
28pub type PADCRCSTRIP_W<'a, REG> = crate::BitWriter<'a, REG>;
29#[doc = "Field `RETRY` reader - When this bit is set the MAC attempts only one transmission. When a collision occurs on the MII interface the MAC ignores the current frame transmission and reports a Frame Abort with excessive collision error in the transmit frame status. When this bit is reset the MAC attempts retries based on the settings of the BL field (Bits \\[6:5\\]). This bit is applicable only in the half-duplex Mode."]
30pub type RETRY_R = crate::BitReader;
31#[doc = "Field `RETRY` writer - When this bit is set the MAC attempts only one transmission. When a collision occurs on the MII interface the MAC ignores the current frame transmission and reports a Frame Abort with excessive collision error in the transmit frame status. When this bit is reset the MAC attempts retries based on the settings of the BL field (Bits \\[6:5\\]). This bit is applicable only in the half-duplex Mode."]
32pub type RETRY_W<'a, REG> = crate::BitWriter<'a, REG>;
33#[doc = "Field `RXIPCOFFLOAD` reader - When this bit is set the MAC calculates the 16-bit one's complement of the one's complement sum of all received Ethernet frame payloads. It also checks whether the IPv4 Header checksum (assumed to be bytes 25/26 or 29/30 (VLAN-tagged) of the received Ethernet frame) is correct for the received frame and gives the status in the receive status word. The MAC also appends the 16-bit checksum calculated for the IP header datagram payload (bytes after the IPv4 header) and appends it to the Ethernet frame transferred to the application (when Type 2 COE is deselected). When this bit is reset this function is disabled."]
34pub type RXIPCOFFLOAD_R = crate::BitReader;
35#[doc = "Field `RXIPCOFFLOAD` writer - When this bit is set the MAC calculates the 16-bit one's complement of the one's complement sum of all received Ethernet frame payloads. It also checks whether the IPv4 Header checksum (assumed to be bytes 25/26 or 29/30 (VLAN-tagged) of the received Ethernet frame) is correct for the received frame and gives the status in the receive status word. The MAC also appends the 16-bit checksum calculated for the IP header datagram payload (bytes after the IPv4 header) and appends it to the Ethernet frame transferred to the application (when Type 2 COE is deselected). When this bit is reset this function is disabled."]
36pub type RXIPCOFFLOAD_W<'a, REG> = crate::BitWriter<'a, REG>;
37#[doc = "Field `DUPLEX` reader - When this bit is set the MAC operates in the full-duplex mode where it can transmit and receive simultaneously. This bit is read only with default value of 1'b1 in the full-duplex-mode."]
38pub type DUPLEX_R = crate::BitReader;
39#[doc = "Field `DUPLEX` writer - When this bit is set the MAC operates in the full-duplex mode where it can transmit and receive simultaneously. This bit is read only with default value of 1'b1 in the full-duplex-mode."]
40pub type DUPLEX_W<'a, REG> = crate::BitWriter<'a, REG>;
41#[doc = "Field `LOOPBACK` reader - When this bit is set the MAC operates in the loopback mode MII. The MII Receive clock input (CLK_RX) is required for the loopback to work properly because the transmit clock is not looped-back internally."]
42pub type LOOPBACK_R = crate::BitReader;
43#[doc = "Field `LOOPBACK` writer - When this bit is set the MAC operates in the loopback mode MII. The MII Receive clock input (CLK_RX) is required for the loopback to work properly because the transmit clock is not looped-back internally."]
44pub type LOOPBACK_W<'a, REG> = crate::BitWriter<'a, REG>;
45#[doc = "Field `RXOWN` reader - When this bit is set the MAC disables the reception of frames when the TX_EN is asserted in the half-duplex mode. When this bit is reset the MAC receives all packets that are given by the PHY while transmitting. This bit is not applicable if the MAC is operating in the full duplex mode."]
46pub type RXOWN_R = crate::BitReader;
47#[doc = "Field `RXOWN` writer - When this bit is set the MAC disables the reception of frames when the TX_EN is asserted in the half-duplex mode. When this bit is reset the MAC receives all packets that are given by the PHY while transmitting. This bit is not applicable if the MAC is operating in the full duplex mode."]
48pub type RXOWN_W<'a, REG> = crate::BitWriter<'a, REG>;
49#[doc = "Field `FESPEED` reader - This bit selects the speed in the MII RMII interface. 0: 10 Mbps. 1: 100 Mbps."]
50pub type FESPEED_R = crate::BitReader;
51#[doc = "Field `FESPEED` writer - This bit selects the speed in the MII RMII interface. 0: 10 Mbps. 1: 100 Mbps."]
52pub type FESPEED_W<'a, REG> = crate::BitWriter<'a, REG>;
53#[doc = "Field `MII` reader - This bit selects the Ethernet line speed. It should be set to 1 for 10 or 100 Mbps operations.In 10 or 100 Mbps operations this bit along with FES(EMACFESPEED) bit it selects the exact linespeed. In the 10/100 Mbps-only operations the bit is always 1."]
54pub type MII_R = crate::BitReader;
55#[doc = "Field `MII` writer - This bit selects the Ethernet line speed. It should be set to 1 for 10 or 100 Mbps operations.In 10 or 100 Mbps operations this bit along with FES(EMACFESPEED) bit it selects the exact linespeed. In the 10/100 Mbps-only operations the bit is always 1."]
56pub type MII_W<'a, REG> = crate::BitWriter<'a, REG>;
57#[doc = "Field `DISABLECRS` reader - When set high this bit makes the MAC transmitter ignore the MII CRS signal during frame transmission in the half-duplex mode. This request results in no errors generated because of Loss of Carrier or No Carrier during such transmission. When this bit is low the MAC transmitter generates such errors because of Carrier Sense and can even abort the transmissions."]
58pub type DISABLECRS_R = crate::BitReader;
59#[doc = "Field `DISABLECRS` writer - When set high this bit makes the MAC transmitter ignore the MII CRS signal during frame transmission in the half-duplex mode. This request results in no errors generated because of Loss of Carrier or No Carrier during such transmission. When this bit is low the MAC transmitter generates such errors because of Carrier Sense and can even abort the transmissions."]
60pub type DISABLECRS_W<'a, REG> = crate::BitWriter<'a, REG>;
61#[doc = "Field `INTERFRAMEGAP` reader - These bits control the minimum IFG between frames during transmission. 3'b000: 96 bit times. 3'b001: 88 bit times. 3'b010: 80 bit times. 3'b111: 40 bit times. In the half-duplex mode the minimum IFG can be configured only for 64 bit times (IFG = 100). Lower values are not considered."]
62pub type INTERFRAMEGAP_R = crate::FieldReader;
63#[doc = "Field `INTERFRAMEGAP` writer - These bits control the minimum IFG between frames during transmission. 3'b000: 96 bit times. 3'b001: 88 bit times. 3'b010: 80 bit times. 3'b111: 40 bit times. In the half-duplex mode the minimum IFG can be configured only for 64 bit times (IFG = 100). Lower values are not considered."]
64pub type INTERFRAMEGAP_W<'a, REG> = crate::FieldWriter<'a, REG, 3>;
65#[doc = "Field `JUMBOFRAME` reader - When this bit is set the MAC allows Jumbo frames of 9 018 bytes (9 022 bytes for VLAN tagged frames) without reporting a giant frame error in the receive frame status."]
66pub type JUMBOFRAME_R = crate::BitReader;
67#[doc = "Field `JUMBOFRAME` writer - When this bit is set the MAC allows Jumbo frames of 9 018 bytes (9 022 bytes for VLAN tagged frames) without reporting a giant frame error in the receive frame status."]
68pub type JUMBOFRAME_W<'a, REG> = crate::BitWriter<'a, REG>;
69#[doc = "Field `JABBER` reader - When this bit is set the MAC disables the jabber timer on the transmitter. The MAC can transfer frames of up to 16 383 bytes. When this bit is reset the MAC cuts off the transmitter if the application sends out more than 2 048 bytes of data (10 240 if JE is set high) during Transmission."]
70pub type JABBER_R = crate::BitReader;
71#[doc = "Field `JABBER` writer - When this bit is set the MAC disables the jabber timer on the transmitter. The MAC can transfer frames of up to 16 383 bytes. When this bit is reset the MAC cuts off the transmitter if the application sends out more than 2 048 bytes of data (10 240 if JE is set high) during Transmission."]
72pub type JABBER_W<'a, REG> = crate::BitWriter<'a, REG>;
73#[doc = "Field `WATCHDOG` reader - When this bit is set the MAC disables the watchdog timer on the receiver. The MAC can receive frames of up to 16 383 bytes. When this bit is reset the MAC does not allow a receive frame which more than 2 048 bytes (10 240 if JE is set high) or the value programmed in Register (Watchdog Timeout Register). The MAC cuts off any bytes received after the watchdog limit number of bytes."]
74pub type WATCHDOG_R = crate::BitReader;
75#[doc = "Field `WATCHDOG` writer - When this bit is set the MAC disables the watchdog timer on the receiver. The MAC can receive frames of up to 16 383 bytes. When this bit is reset the MAC does not allow a receive frame which more than 2 048 bytes (10 240 if JE is set high) or the value programmed in Register (Watchdog Timeout Register). The MAC cuts off any bytes received after the watchdog limit number of bytes."]
76pub type WATCHDOG_W<'a, REG> = crate::BitWriter<'a, REG>;
77#[doc = "Field `ASS2KP` reader - When set the MAC considers all frames with up to 2 000 bytes length as normal packets.When Bit\\[20\\] (JE) is not set the MAC considers all received frames of size more than 2K bytes as Giant frames. When this bit is reset and Bit\\[20\\] (JE) is not set the MAC considers all received frames of size more than 1 518 bytes (1 522 bytes for tagged) as Giant frames. When Bit\\[20\\] is set setting this bit has no effect on Giant Frame status."]
78pub type ASS2KP_R = crate::BitReader;
79#[doc = "Field `ASS2KP` writer - When set the MAC considers all frames with up to 2 000 bytes length as normal packets.When Bit\\[20\\] (JE) is not set the MAC considers all received frames of size more than 2K bytes as Giant frames. When this bit is reset and Bit\\[20\\] (JE) is not set the MAC considers all received frames of size more than 1 518 bytes (1 522 bytes for tagged) as Giant frames. When Bit\\[20\\] is set setting this bit has no effect on Giant Frame status."]
80pub type ASS2KP_W<'a, REG> = crate::BitWriter<'a, REG>;
81#[doc = "Field `SAIRC` reader - This field controls the source address insertion or replacement for all transmitted frames.Bit\\[30\\] specifies which MAC Address register (0 or 1) is used for source address insertion or replacement based on the values of Bits \\[29:28\\]: 2'b0x: The input signals mti_sa_ctrl_i and ati_sa_ctrl_i control the SA field generation. 2'b10: If Bit\\[30\\] is set to 0 the MAC inserts the content of the MAC Address 0 registers in the SA field of all transmitted frames. If Bit\\[30\\] is set to 1 the MAC inserts the content of the MAC Address 1 registers in the SA field of all transmitted frames. 2'b11: If Bit\\[30\\] is set to 0 the MAC replaces the content of the MAC Address 0 registers in the SA field of all transmitted frames. If Bit\\[30\\] is set to 1 the MAC replaces the content of the MAC Address 1 registers in the SA field of all transmitted frames."]
82pub type SAIRC_R = crate::FieldReader;
83#[doc = "Field `SAIRC` writer - This field controls the source address insertion or replacement for all transmitted frames.Bit\\[30\\] specifies which MAC Address register (0 or 1) is used for source address insertion or replacement based on the values of Bits \\[29:28\\]: 2'b0x: The input signals mti_sa_ctrl_i and ati_sa_ctrl_i control the SA field generation. 2'b10: If Bit\\[30\\] is set to 0 the MAC inserts the content of the MAC Address 0 registers in the SA field of all transmitted frames. If Bit\\[30\\] is set to 1 the MAC inserts the content of the MAC Address 1 registers in the SA field of all transmitted frames. 2'b11: If Bit\\[30\\] is set to 0 the MAC replaces the content of the MAC Address 0 registers in the SA field of all transmitted frames. If Bit\\[30\\] is set to 1 the MAC replaces the content of the MAC Address 1 registers in the SA field of all transmitted frames."]
84pub type SAIRC_W<'a, REG> = crate::FieldWriter<'a, REG, 3>;
85impl R {
86 #[doc = "Bits 0:1 - These bits control the number of preamble bytes that are added to the beginning of every Transmit frame. The preamble reduction occurs only when the MAC is operating in the full-duplex mode.2'b00: 7 bytes of preamble. 2'b01: 5 bytes of preamble. 2'b10: 3 bytes of preamble."]
87 #[inline(always)]
88 pub fn pltf(&self) -> PLTF_R {
89 PLTF_R::new((self.bits & 3) as u8)
90 }
91 #[doc = "Bit 2 - When this bit is set the receiver state machine of the MAC is enabled for receiving frames from the MII. When this bit is reset the MAC receive state machine is disabled after the completion of the reception of the current frame and does not receive any further frames from the MII."]
92 #[inline(always)]
93 pub fn rx(&self) -> RX_R {
94 RX_R::new(((self.bits >> 2) & 1) != 0)
95 }
96 #[doc = "Bit 3 - When this bit is set the transmit state machine of the MAC is enabled for transmission on the MII. When this bit is reset the MAC transmit state machine is disabled after the completion of the transmission of the current frame and does not transmit any further frames."]
97 #[inline(always)]
98 pub fn tx(&self) -> TX_R {
99 TX_R::new(((self.bits >> 3) & 1) != 0)
100 }
101 #[doc = "Bit 4 - Deferral Check."]
102 #[inline(always)]
103 pub fn deferralcheck(&self) -> DEFERRALCHECK_R {
104 DEFERRALCHECK_R::new(((self.bits >> 4) & 1) != 0)
105 }
106 #[doc = "Bits 5:6 - The Back-Off limit determines the random integer number (r) of slot time delays (512 bit times for 10/100 Mbps) for which the MAC waits before rescheduling a transmission attempt during retries after a collision. This bit is applicable only in the half-duplex mode. 00: k= min (n 10). 01: k = min (n 8). 10: k = min (n 4). 11: k = min (n 1) n = retransmission attempt. The random integer r takes the value in the Range 0 ~ 2000."]
107 #[inline(always)]
108 pub fn backofflimit(&self) -> BACKOFFLIMIT_R {
109 BACKOFFLIMIT_R::new(((self.bits >> 5) & 3) as u8)
110 }
111 #[doc = "Bit 7 - When this bit is set the MAC strips the Pad or FCS field on the incoming frames only if the value of the length field is less than 1 536 bytes. All received frames with length field greater than or equal to 1 536 bytes are passed to the application without stripping the Pad or FCS field. When this bit is reset the MAC passes all incoming frames without modifying them to the Host."]
112 #[inline(always)]
113 pub fn padcrcstrip(&self) -> PADCRCSTRIP_R {
114 PADCRCSTRIP_R::new(((self.bits >> 7) & 1) != 0)
115 }
116 #[doc = "Bit 9 - When this bit is set the MAC attempts only one transmission. When a collision occurs on the MII interface the MAC ignores the current frame transmission and reports a Frame Abort with excessive collision error in the transmit frame status. When this bit is reset the MAC attempts retries based on the settings of the BL field (Bits \\[6:5\\]). This bit is applicable only in the half-duplex Mode."]
117 #[inline(always)]
118 pub fn retry(&self) -> RETRY_R {
119 RETRY_R::new(((self.bits >> 9) & 1) != 0)
120 }
121 #[doc = "Bit 10 - When this bit is set the MAC calculates the 16-bit one's complement of the one's complement sum of all received Ethernet frame payloads. It also checks whether the IPv4 Header checksum (assumed to be bytes 25/26 or 29/30 (VLAN-tagged) of the received Ethernet frame) is correct for the received frame and gives the status in the receive status word. The MAC also appends the 16-bit checksum calculated for the IP header datagram payload (bytes after the IPv4 header) and appends it to the Ethernet frame transferred to the application (when Type 2 COE is deselected). When this bit is reset this function is disabled."]
122 #[inline(always)]
123 pub fn rxipcoffload(&self) -> RXIPCOFFLOAD_R {
124 RXIPCOFFLOAD_R::new(((self.bits >> 10) & 1) != 0)
125 }
126 #[doc = "Bit 11 - When this bit is set the MAC operates in the full-duplex mode where it can transmit and receive simultaneously. This bit is read only with default value of 1'b1 in the full-duplex-mode."]
127 #[inline(always)]
128 pub fn duplex(&self) -> DUPLEX_R {
129 DUPLEX_R::new(((self.bits >> 11) & 1) != 0)
130 }
131 #[doc = "Bit 12 - When this bit is set the MAC operates in the loopback mode MII. The MII Receive clock input (CLK_RX) is required for the loopback to work properly because the transmit clock is not looped-back internally."]
132 #[inline(always)]
133 pub fn loopback(&self) -> LOOPBACK_R {
134 LOOPBACK_R::new(((self.bits >> 12) & 1) != 0)
135 }
136 #[doc = "Bit 13 - When this bit is set the MAC disables the reception of frames when the TX_EN is asserted in the half-duplex mode. When this bit is reset the MAC receives all packets that are given by the PHY while transmitting. This bit is not applicable if the MAC is operating in the full duplex mode."]
137 #[inline(always)]
138 pub fn rxown(&self) -> RXOWN_R {
139 RXOWN_R::new(((self.bits >> 13) & 1) != 0)
140 }
141 #[doc = "Bit 14 - This bit selects the speed in the MII RMII interface. 0: 10 Mbps. 1: 100 Mbps."]
142 #[inline(always)]
143 pub fn fespeed(&self) -> FESPEED_R {
144 FESPEED_R::new(((self.bits >> 14) & 1) != 0)
145 }
146 #[doc = "Bit 15 - This bit selects the Ethernet line speed. It should be set to 1 for 10 or 100 Mbps operations.In 10 or 100 Mbps operations this bit along with FES(EMACFESPEED) bit it selects the exact linespeed. In the 10/100 Mbps-only operations the bit is always 1."]
147 #[inline(always)]
148 pub fn mii(&self) -> MII_R {
149 MII_R::new(((self.bits >> 15) & 1) != 0)
150 }
151 #[doc = "Bit 16 - When set high this bit makes the MAC transmitter ignore the MII CRS signal during frame transmission in the half-duplex mode. This request results in no errors generated because of Loss of Carrier or No Carrier during such transmission. When this bit is low the MAC transmitter generates such errors because of Carrier Sense and can even abort the transmissions."]
152 #[inline(always)]
153 pub fn disablecrs(&self) -> DISABLECRS_R {
154 DISABLECRS_R::new(((self.bits >> 16) & 1) != 0)
155 }
156 #[doc = "Bits 17:19 - These bits control the minimum IFG between frames during transmission. 3'b000: 96 bit times. 3'b001: 88 bit times. 3'b010: 80 bit times. 3'b111: 40 bit times. In the half-duplex mode the minimum IFG can be configured only for 64 bit times (IFG = 100). Lower values are not considered."]
157 #[inline(always)]
158 pub fn interframegap(&self) -> INTERFRAMEGAP_R {
159 INTERFRAMEGAP_R::new(((self.bits >> 17) & 7) as u8)
160 }
161 #[doc = "Bit 20 - When this bit is set the MAC allows Jumbo frames of 9 018 bytes (9 022 bytes for VLAN tagged frames) without reporting a giant frame error in the receive frame status."]
162 #[inline(always)]
163 pub fn jumboframe(&self) -> JUMBOFRAME_R {
164 JUMBOFRAME_R::new(((self.bits >> 20) & 1) != 0)
165 }
166 #[doc = "Bit 22 - When this bit is set the MAC disables the jabber timer on the transmitter. The MAC can transfer frames of up to 16 383 bytes. When this bit is reset the MAC cuts off the transmitter if the application sends out more than 2 048 bytes of data (10 240 if JE is set high) during Transmission."]
167 #[inline(always)]
168 pub fn jabber(&self) -> JABBER_R {
169 JABBER_R::new(((self.bits >> 22) & 1) != 0)
170 }
171 #[doc = "Bit 23 - When this bit is set the MAC disables the watchdog timer on the receiver. The MAC can receive frames of up to 16 383 bytes. When this bit is reset the MAC does not allow a receive frame which more than 2 048 bytes (10 240 if JE is set high) or the value programmed in Register (Watchdog Timeout Register). The MAC cuts off any bytes received after the watchdog limit number of bytes."]
172 #[inline(always)]
173 pub fn watchdog(&self) -> WATCHDOG_R {
174 WATCHDOG_R::new(((self.bits >> 23) & 1) != 0)
175 }
176 #[doc = "Bit 27 - When set the MAC considers all frames with up to 2 000 bytes length as normal packets.When Bit\\[20\\] (JE) is not set the MAC considers all received frames of size more than 2K bytes as Giant frames. When this bit is reset and Bit\\[20\\] (JE) is not set the MAC considers all received frames of size more than 1 518 bytes (1 522 bytes for tagged) as Giant frames. When Bit\\[20\\] is set setting this bit has no effect on Giant Frame status."]
177 #[inline(always)]
178 pub fn ass2kp(&self) -> ASS2KP_R {
179 ASS2KP_R::new(((self.bits >> 27) & 1) != 0)
180 }
181 #[doc = "Bits 28:30 - This field controls the source address insertion or replacement for all transmitted frames.Bit\\[30\\] specifies which MAC Address register (0 or 1) is used for source address insertion or replacement based on the values of Bits \\[29:28\\]: 2'b0x: The input signals mti_sa_ctrl_i and ati_sa_ctrl_i control the SA field generation. 2'b10: If Bit\\[30\\] is set to 0 the MAC inserts the content of the MAC Address 0 registers in the SA field of all transmitted frames. If Bit\\[30\\] is set to 1 the MAC inserts the content of the MAC Address 1 registers in the SA field of all transmitted frames. 2'b11: If Bit\\[30\\] is set to 0 the MAC replaces the content of the MAC Address 0 registers in the SA field of all transmitted frames. If Bit\\[30\\] is set to 1 the MAC replaces the content of the MAC Address 1 registers in the SA field of all transmitted frames."]
182 #[inline(always)]
183 pub fn sairc(&self) -> SAIRC_R {
184 SAIRC_R::new(((self.bits >> 28) & 7) as u8)
185 }
186}
187#[cfg(feature = "impl-register-debug")]
188impl core::fmt::Debug for R {
189 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
190 f.debug_struct("EMACCONFIG")
191 .field("pltf", &self.pltf())
192 .field("rx", &self.rx())
193 .field("tx", &self.tx())
194 .field("deferralcheck", &self.deferralcheck())
195 .field("backofflimit", &self.backofflimit())
196 .field("padcrcstrip", &self.padcrcstrip())
197 .field("retry", &self.retry())
198 .field("rxipcoffload", &self.rxipcoffload())
199 .field("duplex", &self.duplex())
200 .field("loopback", &self.loopback())
201 .field("rxown", &self.rxown())
202 .field("fespeed", &self.fespeed())
203 .field("mii", &self.mii())
204 .field("disablecrs", &self.disablecrs())
205 .field("interframegap", &self.interframegap())
206 .field("jumboframe", &self.jumboframe())
207 .field("jabber", &self.jabber())
208 .field("watchdog", &self.watchdog())
209 .field("ass2kp", &self.ass2kp())
210 .field("sairc", &self.sairc())
211 .finish()
212 }
213}
214impl W {
215 #[doc = "Bits 0:1 - These bits control the number of preamble bytes that are added to the beginning of every Transmit frame. The preamble reduction occurs only when the MAC is operating in the full-duplex mode.2'b00: 7 bytes of preamble. 2'b01: 5 bytes of preamble. 2'b10: 3 bytes of preamble."]
216 #[inline(always)]
217 pub fn pltf(&mut self) -> PLTF_W<EMACCONFIG_SPEC> {
218 PLTF_W::new(self, 0)
219 }
220 #[doc = "Bit 2 - When this bit is set the receiver state machine of the MAC is enabled for receiving frames from the MII. When this bit is reset the MAC receive state machine is disabled after the completion of the reception of the current frame and does not receive any further frames from the MII."]
221 #[inline(always)]
222 pub fn rx(&mut self) -> RX_W<EMACCONFIG_SPEC> {
223 RX_W::new(self, 2)
224 }
225 #[doc = "Bit 3 - When this bit is set the transmit state machine of the MAC is enabled for transmission on the MII. When this bit is reset the MAC transmit state machine is disabled after the completion of the transmission of the current frame and does not transmit any further frames."]
226 #[inline(always)]
227 pub fn tx(&mut self) -> TX_W<EMACCONFIG_SPEC> {
228 TX_W::new(self, 3)
229 }
230 #[doc = "Bit 4 - Deferral Check."]
231 #[inline(always)]
232 pub fn deferralcheck(&mut self) -> DEFERRALCHECK_W<EMACCONFIG_SPEC> {
233 DEFERRALCHECK_W::new(self, 4)
234 }
235 #[doc = "Bits 5:6 - The Back-Off limit determines the random integer number (r) of slot time delays (512 bit times for 10/100 Mbps) for which the MAC waits before rescheduling a transmission attempt during retries after a collision. This bit is applicable only in the half-duplex mode. 00: k= min (n 10). 01: k = min (n 8). 10: k = min (n 4). 11: k = min (n 1) n = retransmission attempt. The random integer r takes the value in the Range 0 ~ 2000."]
236 #[inline(always)]
237 pub fn backofflimit(&mut self) -> BACKOFFLIMIT_W<EMACCONFIG_SPEC> {
238 BACKOFFLIMIT_W::new(self, 5)
239 }
240 #[doc = "Bit 7 - When this bit is set the MAC strips the Pad or FCS field on the incoming frames only if the value of the length field is less than 1 536 bytes. All received frames with length field greater than or equal to 1 536 bytes are passed to the application without stripping the Pad or FCS field. When this bit is reset the MAC passes all incoming frames without modifying them to the Host."]
241 #[inline(always)]
242 pub fn padcrcstrip(&mut self) -> PADCRCSTRIP_W<EMACCONFIG_SPEC> {
243 PADCRCSTRIP_W::new(self, 7)
244 }
245 #[doc = "Bit 9 - When this bit is set the MAC attempts only one transmission. When a collision occurs on the MII interface the MAC ignores the current frame transmission and reports a Frame Abort with excessive collision error in the transmit frame status. When this bit is reset the MAC attempts retries based on the settings of the BL field (Bits \\[6:5\\]). This bit is applicable only in the half-duplex Mode."]
246 #[inline(always)]
247 pub fn retry(&mut self) -> RETRY_W<EMACCONFIG_SPEC> {
248 RETRY_W::new(self, 9)
249 }
250 #[doc = "Bit 10 - When this bit is set the MAC calculates the 16-bit one's complement of the one's complement sum of all received Ethernet frame payloads. It also checks whether the IPv4 Header checksum (assumed to be bytes 25/26 or 29/30 (VLAN-tagged) of the received Ethernet frame) is correct for the received frame and gives the status in the receive status word. The MAC also appends the 16-bit checksum calculated for the IP header datagram payload (bytes after the IPv4 header) and appends it to the Ethernet frame transferred to the application (when Type 2 COE is deselected). When this bit is reset this function is disabled."]
251 #[inline(always)]
252 pub fn rxipcoffload(&mut self) -> RXIPCOFFLOAD_W<EMACCONFIG_SPEC> {
253 RXIPCOFFLOAD_W::new(self, 10)
254 }
255 #[doc = "Bit 11 - When this bit is set the MAC operates in the full-duplex mode where it can transmit and receive simultaneously. This bit is read only with default value of 1'b1 in the full-duplex-mode."]
256 #[inline(always)]
257 pub fn duplex(&mut self) -> DUPLEX_W<EMACCONFIG_SPEC> {
258 DUPLEX_W::new(self, 11)
259 }
260 #[doc = "Bit 12 - When this bit is set the MAC operates in the loopback mode MII. The MII Receive clock input (CLK_RX) is required for the loopback to work properly because the transmit clock is not looped-back internally."]
261 #[inline(always)]
262 pub fn loopback(&mut self) -> LOOPBACK_W<EMACCONFIG_SPEC> {
263 LOOPBACK_W::new(self, 12)
264 }
265 #[doc = "Bit 13 - When this bit is set the MAC disables the reception of frames when the TX_EN is asserted in the half-duplex mode. When this bit is reset the MAC receives all packets that are given by the PHY while transmitting. This bit is not applicable if the MAC is operating in the full duplex mode."]
266 #[inline(always)]
267 pub fn rxown(&mut self) -> RXOWN_W<EMACCONFIG_SPEC> {
268 RXOWN_W::new(self, 13)
269 }
270 #[doc = "Bit 14 - This bit selects the speed in the MII RMII interface. 0: 10 Mbps. 1: 100 Mbps."]
271 #[inline(always)]
272 pub fn fespeed(&mut self) -> FESPEED_W<EMACCONFIG_SPEC> {
273 FESPEED_W::new(self, 14)
274 }
275 #[doc = "Bit 15 - This bit selects the Ethernet line speed. It should be set to 1 for 10 or 100 Mbps operations.In 10 or 100 Mbps operations this bit along with FES(EMACFESPEED) bit it selects the exact linespeed. In the 10/100 Mbps-only operations the bit is always 1."]
276 #[inline(always)]
277 pub fn mii(&mut self) -> MII_W<EMACCONFIG_SPEC> {
278 MII_W::new(self, 15)
279 }
280 #[doc = "Bit 16 - When set high this bit makes the MAC transmitter ignore the MII CRS signal during frame transmission in the half-duplex mode. This request results in no errors generated because of Loss of Carrier or No Carrier during such transmission. When this bit is low the MAC transmitter generates such errors because of Carrier Sense and can even abort the transmissions."]
281 #[inline(always)]
282 pub fn disablecrs(&mut self) -> DISABLECRS_W<EMACCONFIG_SPEC> {
283 DISABLECRS_W::new(self, 16)
284 }
285 #[doc = "Bits 17:19 - These bits control the minimum IFG between frames during transmission. 3'b000: 96 bit times. 3'b001: 88 bit times. 3'b010: 80 bit times. 3'b111: 40 bit times. In the half-duplex mode the minimum IFG can be configured only for 64 bit times (IFG = 100). Lower values are not considered."]
286 #[inline(always)]
287 pub fn interframegap(&mut self) -> INTERFRAMEGAP_W<EMACCONFIG_SPEC> {
288 INTERFRAMEGAP_W::new(self, 17)
289 }
290 #[doc = "Bit 20 - When this bit is set the MAC allows Jumbo frames of 9 018 bytes (9 022 bytes for VLAN tagged frames) without reporting a giant frame error in the receive frame status."]
291 #[inline(always)]
292 pub fn jumboframe(&mut self) -> JUMBOFRAME_W<EMACCONFIG_SPEC> {
293 JUMBOFRAME_W::new(self, 20)
294 }
295 #[doc = "Bit 22 - When this bit is set the MAC disables the jabber timer on the transmitter. The MAC can transfer frames of up to 16 383 bytes. When this bit is reset the MAC cuts off the transmitter if the application sends out more than 2 048 bytes of data (10 240 if JE is set high) during Transmission."]
296 #[inline(always)]
297 pub fn jabber(&mut self) -> JABBER_W<EMACCONFIG_SPEC> {
298 JABBER_W::new(self, 22)
299 }
300 #[doc = "Bit 23 - When this bit is set the MAC disables the watchdog timer on the receiver. The MAC can receive frames of up to 16 383 bytes. When this bit is reset the MAC does not allow a receive frame which more than 2 048 bytes (10 240 if JE is set high) or the value programmed in Register (Watchdog Timeout Register). The MAC cuts off any bytes received after the watchdog limit number of bytes."]
301 #[inline(always)]
302 pub fn watchdog(&mut self) -> WATCHDOG_W<EMACCONFIG_SPEC> {
303 WATCHDOG_W::new(self, 23)
304 }
305 #[doc = "Bit 27 - When set the MAC considers all frames with up to 2 000 bytes length as normal packets.When Bit\\[20\\] (JE) is not set the MAC considers all received frames of size more than 2K bytes as Giant frames. When this bit is reset and Bit\\[20\\] (JE) is not set the MAC considers all received frames of size more than 1 518 bytes (1 522 bytes for tagged) as Giant frames. When Bit\\[20\\] is set setting this bit has no effect on Giant Frame status."]
306 #[inline(always)]
307 pub fn ass2kp(&mut self) -> ASS2KP_W<EMACCONFIG_SPEC> {
308 ASS2KP_W::new(self, 27)
309 }
310 #[doc = "Bits 28:30 - This field controls the source address insertion or replacement for all transmitted frames.Bit\\[30\\] specifies which MAC Address register (0 or 1) is used for source address insertion or replacement based on the values of Bits \\[29:28\\]: 2'b0x: The input signals mti_sa_ctrl_i and ati_sa_ctrl_i control the SA field generation. 2'b10: If Bit\\[30\\] is set to 0 the MAC inserts the content of the MAC Address 0 registers in the SA field of all transmitted frames. If Bit\\[30\\] is set to 1 the MAC inserts the content of the MAC Address 1 registers in the SA field of all transmitted frames. 2'b11: If Bit\\[30\\] is set to 0 the MAC replaces the content of the MAC Address 0 registers in the SA field of all transmitted frames. If Bit\\[30\\] is set to 1 the MAC replaces the content of the MAC Address 1 registers in the SA field of all transmitted frames."]
311 #[inline(always)]
312 pub fn sairc(&mut self) -> SAIRC_W<EMACCONFIG_SPEC> {
313 SAIRC_W::new(self, 28)
314 }
315}
316#[doc = "MAC configuration\n\nYou can [`read`](crate::Reg::read) this register and get [`emacconfig::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`emacconfig::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
317pub struct EMACCONFIG_SPEC;
318impl crate::RegisterSpec for EMACCONFIG_SPEC {
319 type Ux = u32;
320}
321#[doc = "`read()` method returns [`emacconfig::R`](R) reader structure"]
322impl crate::Readable for EMACCONFIG_SPEC {}
323#[doc = "`write(|w| ..)` method takes [`emacconfig::W`](W) writer structure"]
324impl crate::Writable for EMACCONFIG_SPEC {
325 type Safety = crate::Unsafe;
326 const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
327 const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
328}
329#[doc = "`reset()` method sets EMACCONFIG to value 0"]
330impl crate::Resettable for EMACCONFIG_SPEC {
331 const RESET_VALUE: u32 = 0;
332}