Module wifi

MAC controller for Wi-Fi peripheral

Re-exports

pub use self::filter_bank::FILTER_BANK;

pub use self::rx_dma_list::RX_DMA_LIST;

pub use self::mac_interrupt::MAC_INTERRUPT;

pub use self::txq_state::TXQ_STATE;

pub use self::tx_slot_config::TX_SLOT_CONFIG;

pub use self::crypto_key_slot::CRYPTO_KEY_SLOT;

pub use self::crypto_control::CRYPTO_CONTROL;

Modules

crypto_control

Cluster Control registers for hardware crypto

crypto_key_slot

Cluster Cryptographic keys for MPDU encapsulation and decapsulation

ctrl

Exact name and meaning unknown, used for initializing the MAC

duration

duration of the frame exchange

filter_bank

Cluster Filter banks for frame reception. Bank zero is for the BSSID and bank one for the RA. Each filter bank has registers for two interfaces.

ht_sig

HT-SIG field in HT preamble

ht_unknown

exact meaning and name unknown, related to HT

hw_stat_ack_int

hw_stat_block_err

hw_stat_cts_int

hw_stat_full2

hw_stat_hop_err

hw_stat_panic

hw_stat_rifs_int

hw_stat_rts_int

hw_stat_rx_end

hw_stat_rx_success

hw_stat_trcts

hw_stat_trigger

hw_stat_tx_ack

hw_stat_tx_cts

hw_stat_tx_hung

hw_stat_tx_rts

interface_rx_control

Controls RX for an interface

mac_interrupt

Cluster Status and clear for the Wi-Fi MAC interrupt

mac_time

Current value of the MAC timer

plcp1

PLCP1

plcp2

PLCP2

pmd

rx_ctrl

Controls the reception of frames

rx_dma_list

Cluster RX_DMA_LIST

tx_slot_config

Cluster Used to configure the TX slot.

txq_state

Cluster State of transmission queues

Structs

RegisterBlock

Register block

Type Aliases

CTRL

CTRL (rw) register accessor: Exact name and meaning unknown, used for initializing the MAC

DURATION

DURATION (rw) register accessor: duration of the frame exchange

HT_SIG

HT_SIG (rw) register accessor: HT-SIG field in HT preamble

HT_UNKNOWN

HT_UNKNOWN (rw) register accessor: exact meaning and name unknown, related to HT

HW_STAT_ACK_INT

HW_STAT_ACK_INT (rw) register accessor:

HW_STAT_BLOCK_ERR

HW_STAT_BLOCK_ERR (rw) register accessor:

HW_STAT_CTS_INT

HW_STAT_CTS_INT (rw) register accessor:

HW_STAT_FULL2

HW_STAT_FULL2 (rw) register accessor:

HW_STAT_HOP_ERR

HW_STAT_HOP_ERR (rw) register accessor:

HW_STAT_PANIC

HW_STAT_PANIC (rw) register accessor:

HW_STAT_RIFS_INT

HW_STAT_RIFS_INT (rw) register accessor:

HW_STAT_RTS_INT

HW_STAT_RTS_INT (rw) register accessor:

HW_STAT_RX_END

HW_STAT_RX_END (rw) register accessor:

HW_STAT_RX_SUCCESS

HW_STAT_RX_SUCCESS (rw) register accessor:

HW_STAT_TRCTS

HW_STAT_TRCTS (rw) register accessor:

HW_STAT_TRIGGER

HW_STAT_TRIGGER (rw) register accessor:

HW_STAT_TX_ACK

HW_STAT_TX_ACK (rw) register accessor:

HW_STAT_TX_CTS

HW_STAT_TX_CTS (rw) register accessor:

HW_STAT_TX_HUNG

HW_STAT_TX_HUNG (rw) register accessor:

HW_STAT_TX_RTS

HW_STAT_TX_RTS (rw) register accessor:

INTERFACE_RX_CONTROL

INTERFACE_RX_CONTROL (rw) register accessor: Controls RX for an interface

MAC_TIME

MAC_TIME (rw) register accessor: Current value of the MAC timer

PLCP1

PLCP1 (rw) register accessor: PLCP1

PLCP2

PLCP2 (rw) register accessor: PLCP2

PMD

PMD (rw) register accessor:

RX_CTRL

RX_CTRL (rw) register accessor: Controls the reception of frames