Module slc

Source
Expand description

SLC Peripheral

Modules§

_0_done_dscr_addr
_0_dscr_cnt
_0_dscr_rec_conf
_0_eof_start_des
_0_len_conf
_0_len_lim_conf
_0_length
_0_push_dscr_addr
_0_rxlink_dscr
_0_rxlink_dscr_bf0
_0_rxlink_dscr_bf1
_0_rxpkt_e_dscr
_0_rxpkt_h_dscr
_0_rxpktu_e_dscr
_0_rxpktu_h_dscr
_0_state0
_0_state1
_0_sub_start_des
_0_to_eof_bfr_des_addr
_0_to_eof_des_addr
_0_tx_eof_des_addr
_0_tx_erreof_des_addr
_0_txlink_dscr
_0_txlink_dscr_bf0
_0_txlink_dscr_bf1
_0_txpkt_e_dscr
_0_txpkt_h_dscr
_0_txpktu_e_dscr
_0_txpktu_h_dscr
_0int_clr
_0int_ena
_0int_ena1
_0int_raw
_0int_st
_0int_st1
_0rx_link
_0rxfifo_push
_0token0
_0token1
_0tx_link
_0txfifo_pop
_1_rxlink_dscr
_1_rxlink_dscr_bf0
_1_rxlink_dscr_bf1
_1_state0
_1_state1
_1_to_eof_bfr_des_addr
_1_to_eof_des_addr
_1_tx_eof_des_addr
_1_tx_erreof_des_addr
_1_txlink_dscr
_1_txlink_dscr_bf0
_1_txlink_dscr_bf1
_1int_clr
_1int_ena
_1int_ena1
_1int_raw
_1int_st
_1int_st1
_1rx_link
_1rxfifo_push
_1token0
_1token1
_1tx_link
_1txfifo_pop
ahb_test
bridge_conf
cmd_infor0
cmd_infor1
conf0
conf1
date
id
intvec_tohost
rx_dscr_conf
rx_status
sdio_crc_st0
sdio_crc_st1
sdio_st
seq_position
token_lat
tx_dscr_conf
tx_status

Structs§

RegisterBlock
Register block

Type Aliases§

AHB_TEST
AHB_TEST (rw) register accessor:
BRIDGE_CONF
BRIDGE_CONF (rw) register accessor:
CMD_INFOR0
CMD_INFOR0 (r) register accessor:
CMD_INFOR1
CMD_INFOR1 (r) register accessor:
CONF0
CONF0 (rw) register accessor:
CONF1
CONF1 (rw) register accessor:
DATE
DATE (rw) register accessor:
ID
ID (rw) register accessor:
INTVEC_TOHOST
INTVEC_TOHOST (w) register accessor:
RX_DSCR_CONF
RX_DSCR_CONF (rw) register accessor:
RX_STATUS
RX_STATUS (r) register accessor:
SDIO_CRC_ST0
SDIO_CRC_ST0 (r) register accessor:
SDIO_CRC_ST1
SDIO_CRC_ST1 (rw) register accessor:
SDIO_ST
SDIO_ST (r) register accessor:
SEQ_POSITION
SEQ_POSITION (rw) register accessor:
TOKEN_LAT
TOKEN_LAT (r) register accessor:
TX_DSCR_CONF
TX_DSCR_CONF (rw) register accessor:
TX_STATUS
TX_STATUS (r) register accessor:
_0INT_CLR
_0INT_CLR (w) register accessor:
_0INT_ENA
_0INT_ENA (rw) register accessor:
_0INT_ENA1
_0INT_ENA1 (rw) register accessor:
_0INT_RAW
_0INT_RAW (r) register accessor:
_0INT_ST
_0INT_ST (r) register accessor:
_0INT_ST1
_0INT_ST1 (r) register accessor:
_0RXFIFO_PUSH
_0RXFIFO_PUSH (rw) register accessor:
_0RX_LINK
_0RX_LINK (rw) register accessor:
_0TOKEN0
_0TOKEN0 (rw) register accessor:
_0TOKEN1
_0TOKEN1 (rw) register accessor:
_0TXFIFO_POP
_0TXFIFO_POP (rw) register accessor:
_0TX_LINK
_0TX_LINK (rw) register accessor:
_0_DONE_DSCR_ADDR
_0_DONE_DSCR_ADDR (r) register accessor:
_0_DSCR_CNT
_0_DSCR_CNT (r) register accessor:
_0_DSCR_REC_CONF
_0_DSCR_REC_CONF (rw) register accessor:
_0_EOF_START_DES
_0_EOF_START_DES (r) register accessor:
_0_LENGTH
_0_LENGTH (r) register accessor:
_0_LEN_CONF
_0_LEN_CONF (rw) register accessor:
_0_LEN_LIM_CONF
_0_LEN_LIM_CONF (rw) register accessor:
_0_PUSH_DSCR_ADDR
_0_PUSH_DSCR_ADDR (r) register accessor:
_0_RXLINK_DSCR
_0_RXLINK_DSCR (r) register accessor:
_0_RXLINK_DSCR_BF0
_0_RXLINK_DSCR_BF0 (r) register accessor:
_0_RXLINK_DSCR_BF1
_0_RXLINK_DSCR_BF1 (r) register accessor:
_0_RXPKTU_E_DSCR
_0_RXPKTU_E_DSCR (r) register accessor:
_0_RXPKTU_H_DSCR
_0_RXPKTU_H_DSCR (r) register accessor:
_0_RXPKT_E_DSCR
_0_RXPKT_E_DSCR (rw) register accessor:
_0_RXPKT_H_DSCR
_0_RXPKT_H_DSCR (rw) register accessor:
_0_STATE0
_0_STATE0 (r) register accessor:
_0_STATE1
_0_STATE1 (r) register accessor:
_0_SUB_START_DES
_0_SUB_START_DES (r) register accessor:
_0_TO_EOF_BFR_DES_ADDR
_0_TO_EOF_BFR_DES_ADDR (r) register accessor:
_0_TO_EOF_DES_ADDR
_0_TO_EOF_DES_ADDR (r) register accessor:
_0_TXLINK_DSCR
_0_TXLINK_DSCR (r) register accessor:
_0_TXLINK_DSCR_BF0
_0_TXLINK_DSCR_BF0 (r) register accessor:
_0_TXLINK_DSCR_BF1
_0_TXLINK_DSCR_BF1 (r) register accessor:
_0_TXPKTU_E_DSCR
_0_TXPKTU_E_DSCR (r) register accessor:
_0_TXPKTU_H_DSCR
_0_TXPKTU_H_DSCR (r) register accessor:
_0_TXPKT_E_DSCR
_0_TXPKT_E_DSCR (rw) register accessor:
_0_TXPKT_H_DSCR
_0_TXPKT_H_DSCR (rw) register accessor:
_0_TX_EOF_DES_ADDR
_0_TX_EOF_DES_ADDR (r) register accessor:
_0_TX_ERREOF_DES_ADDR
_0_TX_ERREOF_DES_ADDR (r) register accessor:
_1INT_CLR
_1INT_CLR (w) register accessor:
_1INT_ENA
_1INT_ENA (rw) register accessor:
_1INT_ENA1
_1INT_ENA1 (rw) register accessor:
_1INT_RAW
_1INT_RAW (r) register accessor:
_1INT_ST
_1INT_ST (r) register accessor:
_1INT_ST1
_1INT_ST1 (r) register accessor:
_1RXFIFO_PUSH
_1RXFIFO_PUSH (rw) register accessor:
_1RX_LINK
_1RX_LINK (rw) register accessor:
_1TOKEN0
_1TOKEN0 (rw) register accessor:
_1TOKEN1
_1TOKEN1 (rw) register accessor:
_1TXFIFO_POP
_1TXFIFO_POP (rw) register accessor:
_1TX_LINK
_1TX_LINK (rw) register accessor:
_1_RXLINK_DSCR
_1_RXLINK_DSCR (r) register accessor:
_1_RXLINK_DSCR_BF0
_1_RXLINK_DSCR_BF0 (r) register accessor:
_1_RXLINK_DSCR_BF1
_1_RXLINK_DSCR_BF1 (r) register accessor:
_1_STATE0
_1_STATE0 (r) register accessor:
_1_STATE1
_1_STATE1 (r) register accessor:
_1_TO_EOF_BFR_DES_ADDR
_1_TO_EOF_BFR_DES_ADDR (r) register accessor:
_1_TO_EOF_DES_ADDR
_1_TO_EOF_DES_ADDR (r) register accessor:
_1_TXLINK_DSCR
_1_TXLINK_DSCR (r) register accessor:
_1_TXLINK_DSCR_BF0
_1_TXLINK_DSCR_BF0 (r) register accessor:
_1_TXLINK_DSCR_BF1
_1_TXLINK_DSCR_BF1 (r) register accessor:
_1_TX_EOF_DES_ADDR
_1_TX_EOF_DES_ADDR (r) register accessor:
_1_TX_ERREOF_DES_ADDR
_1_TX_ERREOF_DES_ADDR (r) register accessor: