esp32/timg0/
rtccalicfg.rs

1#[doc = "Register `RTCCALICFG` reader"]
2pub type R = crate::R<RTCCALICFG_SPEC>;
3#[doc = "Register `RTCCALICFG` writer"]
4pub type W = crate::W<RTCCALICFG_SPEC>;
5#[doc = "Field `RTC_CALI_START_CYCLING` reader - "]
6pub type RTC_CALI_START_CYCLING_R = crate::BitReader;
7#[doc = "Field `RTC_CALI_START_CYCLING` writer - "]
8pub type RTC_CALI_START_CYCLING_W<'a, REG> = crate::BitWriter<'a, REG>;
9#[doc = "Field `RTC_CALI_CLK_SEL` reader - "]
10pub type RTC_CALI_CLK_SEL_R = crate::FieldReader;
11#[doc = "Field `RTC_CALI_CLK_SEL` writer - "]
12pub type RTC_CALI_CLK_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 2>;
13#[doc = "Field `RTC_CALI_RDY` reader - "]
14pub type RTC_CALI_RDY_R = crate::BitReader;
15#[doc = "Field `RTC_CALI_MAX` reader - "]
16pub type RTC_CALI_MAX_R = crate::FieldReader<u16>;
17#[doc = "Field `RTC_CALI_MAX` writer - "]
18pub type RTC_CALI_MAX_W<'a, REG> = crate::FieldWriter<'a, REG, 15, u16>;
19#[doc = "Field `RTC_CALI_START` reader - "]
20pub type RTC_CALI_START_R = crate::BitReader;
21#[doc = "Field `RTC_CALI_START` writer - "]
22pub type RTC_CALI_START_W<'a, REG> = crate::BitWriter<'a, REG>;
23impl R {
24    #[doc = "Bit 12"]
25    #[inline(always)]
26    pub fn rtc_cali_start_cycling(&self) -> RTC_CALI_START_CYCLING_R {
27        RTC_CALI_START_CYCLING_R::new(((self.bits >> 12) & 1) != 0)
28    }
29    #[doc = "Bits 13:14"]
30    #[inline(always)]
31    pub fn rtc_cali_clk_sel(&self) -> RTC_CALI_CLK_SEL_R {
32        RTC_CALI_CLK_SEL_R::new(((self.bits >> 13) & 3) as u8)
33    }
34    #[doc = "Bit 15"]
35    #[inline(always)]
36    pub fn rtc_cali_rdy(&self) -> RTC_CALI_RDY_R {
37        RTC_CALI_RDY_R::new(((self.bits >> 15) & 1) != 0)
38    }
39    #[doc = "Bits 16:30"]
40    #[inline(always)]
41    pub fn rtc_cali_max(&self) -> RTC_CALI_MAX_R {
42        RTC_CALI_MAX_R::new(((self.bits >> 16) & 0x7fff) as u16)
43    }
44    #[doc = "Bit 31"]
45    #[inline(always)]
46    pub fn rtc_cali_start(&self) -> RTC_CALI_START_R {
47        RTC_CALI_START_R::new(((self.bits >> 31) & 1) != 0)
48    }
49}
50#[cfg(feature = "impl-register-debug")]
51impl core::fmt::Debug for R {
52    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
53        f.debug_struct("RTCCALICFG")
54            .field("rtc_cali_start_cycling", &self.rtc_cali_start_cycling())
55            .field("rtc_cali_clk_sel", &self.rtc_cali_clk_sel())
56            .field("rtc_cali_rdy", &self.rtc_cali_rdy())
57            .field("rtc_cali_max", &self.rtc_cali_max())
58            .field("rtc_cali_start", &self.rtc_cali_start())
59            .finish()
60    }
61}
62impl W {
63    #[doc = "Bit 12"]
64    #[inline(always)]
65    pub fn rtc_cali_start_cycling(&mut self) -> RTC_CALI_START_CYCLING_W<RTCCALICFG_SPEC> {
66        RTC_CALI_START_CYCLING_W::new(self, 12)
67    }
68    #[doc = "Bits 13:14"]
69    #[inline(always)]
70    pub fn rtc_cali_clk_sel(&mut self) -> RTC_CALI_CLK_SEL_W<RTCCALICFG_SPEC> {
71        RTC_CALI_CLK_SEL_W::new(self, 13)
72    }
73    #[doc = "Bits 16:30"]
74    #[inline(always)]
75    pub fn rtc_cali_max(&mut self) -> RTC_CALI_MAX_W<RTCCALICFG_SPEC> {
76        RTC_CALI_MAX_W::new(self, 16)
77    }
78    #[doc = "Bit 31"]
79    #[inline(always)]
80    pub fn rtc_cali_start(&mut self) -> RTC_CALI_START_W<RTCCALICFG_SPEC> {
81        RTC_CALI_START_W::new(self, 31)
82    }
83}
84#[doc = "\n\nYou can [`read`](crate::Reg::read) this register and get [`rtccalicfg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`rtccalicfg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
85pub struct RTCCALICFG_SPEC;
86impl crate::RegisterSpec for RTCCALICFG_SPEC {
87    type Ux = u32;
88}
89#[doc = "`read()` method returns [`rtccalicfg::R`](R) reader structure"]
90impl crate::Readable for RTCCALICFG_SPEC {}
91#[doc = "`write(|w| ..)` method takes [`rtccalicfg::W`](W) writer structure"]
92impl crate::Writable for RTCCALICFG_SPEC {
93    type Safety = crate::Unsafe;
94    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
95    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
96}
97#[doc = "`reset()` method sets RTCCALICFG to value 0x0001_3000"]
98impl crate::Resettable for RTCCALICFG_SPEC {
99    const RESET_VALUE: u32 = 0x0001_3000;
100}
esp32/timg0/rtccalicfg.rs

esp32/timg0/
rtccalicfg.rs
