esp32/timg0/
lacthi.rs

1#[doc = "Register `LACTHI` reader"]
2pub type R = crate::R<LACTHI_SPEC>;
3#[doc = "Field `HI` reader - "]
4pub type HI_R = crate::FieldReader<u32>;
5impl R {
6    #[doc = "Bits 0:31"]
7    #[inline(always)]
8    pub fn hi(&self) -> HI_R {
9        HI_R::new(self.bits)
10    }
11}
12#[cfg(feature = "impl-register-debug")]
13impl core::fmt::Debug for R {
14    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
15        f.debug_struct("LACTHI").field("hi", &self.hi()).finish()
16    }
17}
18#[doc = "\n\nYou can [`read`](crate::Reg::read) this register and get [`lacthi::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
19pub struct LACTHI_SPEC;
20impl crate::RegisterSpec for LACTHI_SPEC {
21    type Ux = u32;
22}
23#[doc = "`read()` method returns [`lacthi::R`](R) reader structure"]
24impl crate::Readable for LACTHI_SPEC {}
25#[doc = "`reset()` method sets LACTHI to value 0"]
26impl crate::Resettable for LACTHI_SPEC {
27    const RESET_VALUE: u32 = 0;
28}