1#[doc = "Register `SLAVE2` reader"]
2pub type R = crate::R<SLAVE2_SPEC>;
3#[doc = "Register `SLAVE2` writer"]
4pub type W = crate::W<SLAVE2_SPEC>;
5#[doc = "Field `SLV_RDSTA_DUMMY_CYCLELEN` reader - In the slave mode it is the length in spi_clk cycles of dummy phase for read-status operations. The register value shall be (cycle_num-1)."]
6pub type SLV_RDSTA_DUMMY_CYCLELEN_R = crate::FieldReader;
7#[doc = "Field `SLV_RDSTA_DUMMY_CYCLELEN` writer - In the slave mode it is the length in spi_clk cycles of dummy phase for read-status operations. The register value shall be (cycle_num-1)."]
8pub type SLV_RDSTA_DUMMY_CYCLELEN_W<'a, REG> = crate::FieldWriter<'a, REG, 8>;
9#[doc = "Field `SLV_WRSTA_DUMMY_CYCLELEN` reader - In the slave mode it is the length in spi_clk cycles of dummy phase for write-status operations. The register value shall be (cycle_num-1)."]
10pub type SLV_WRSTA_DUMMY_CYCLELEN_R = crate::FieldReader;
11#[doc = "Field `SLV_WRSTA_DUMMY_CYCLELEN` writer - In the slave mode it is the length in spi_clk cycles of dummy phase for write-status operations. The register value shall be (cycle_num-1)."]
12pub type SLV_WRSTA_DUMMY_CYCLELEN_W<'a, REG> = crate::FieldWriter<'a, REG, 8>;
13#[doc = "Field `SLV_RDBUF_DUMMY_CYCLELEN` reader - In the slave mode it is the length in spi_clk cycles of dummy phase for read-buffer operations. The register value shall be (cycle_num-1)."]
14pub type SLV_RDBUF_DUMMY_CYCLELEN_R = crate::FieldReader;
15#[doc = "Field `SLV_RDBUF_DUMMY_CYCLELEN` writer - In the slave mode it is the length in spi_clk cycles of dummy phase for read-buffer operations. The register value shall be (cycle_num-1)."]
16pub type SLV_RDBUF_DUMMY_CYCLELEN_W<'a, REG> = crate::FieldWriter<'a, REG, 8>;
17#[doc = "Field `SLV_WRBUF_DUMMY_CYCLELEN` reader - In the slave mode it is the length in spi_clk cycles of dummy phase for write-buffer operations. The register value shall be (cycle_num-1)."]
18pub type SLV_WRBUF_DUMMY_CYCLELEN_R = crate::FieldReader;
19#[doc = "Field `SLV_WRBUF_DUMMY_CYCLELEN` writer - In the slave mode it is the length in spi_clk cycles of dummy phase for write-buffer operations. The register value shall be (cycle_num-1)."]
20pub type SLV_WRBUF_DUMMY_CYCLELEN_W<'a, REG> = crate::FieldWriter<'a, REG, 8>;
21impl R {
22 #[doc = "Bits 0:7 - In the slave mode it is the length in spi_clk cycles of dummy phase for read-status operations. The register value shall be (cycle_num-1)."]
23 #[inline(always)]
24 pub fn slv_rdsta_dummy_cyclelen(&self) -> SLV_RDSTA_DUMMY_CYCLELEN_R {
25 SLV_RDSTA_DUMMY_CYCLELEN_R::new((self.bits & 0xff) as u8)
26 }
27 #[doc = "Bits 8:15 - In the slave mode it is the length in spi_clk cycles of dummy phase for write-status operations. The register value shall be (cycle_num-1)."]
28 #[inline(always)]
29 pub fn slv_wrsta_dummy_cyclelen(&self) -> SLV_WRSTA_DUMMY_CYCLELEN_R {
30 SLV_WRSTA_DUMMY_CYCLELEN_R::new(((self.bits >> 8) & 0xff) as u8)
31 }
32 #[doc = "Bits 16:23 - In the slave mode it is the length in spi_clk cycles of dummy phase for read-buffer operations. The register value shall be (cycle_num-1)."]
33 #[inline(always)]
34 pub fn slv_rdbuf_dummy_cyclelen(&self) -> SLV_RDBUF_DUMMY_CYCLELEN_R {
35 SLV_RDBUF_DUMMY_CYCLELEN_R::new(((self.bits >> 16) & 0xff) as u8)
36 }
37 #[doc = "Bits 24:31 - In the slave mode it is the length in spi_clk cycles of dummy phase for write-buffer operations. The register value shall be (cycle_num-1)."]
38 #[inline(always)]
39 pub fn slv_wrbuf_dummy_cyclelen(&self) -> SLV_WRBUF_DUMMY_CYCLELEN_R {
40 SLV_WRBUF_DUMMY_CYCLELEN_R::new(((self.bits >> 24) & 0xff) as u8)
41 }
42}
43#[cfg(feature = "impl-register-debug")]
44impl core::fmt::Debug for R {
45 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
46 f.debug_struct("SLAVE2")
47 .field("slv_rdsta_dummy_cyclelen", &self.slv_rdsta_dummy_cyclelen())
48 .field("slv_wrsta_dummy_cyclelen", &self.slv_wrsta_dummy_cyclelen())
49 .field("slv_rdbuf_dummy_cyclelen", &self.slv_rdbuf_dummy_cyclelen())
50 .field("slv_wrbuf_dummy_cyclelen", &self.slv_wrbuf_dummy_cyclelen())
51 .finish()
52 }
53}
54impl W {
55 #[doc = "Bits 0:7 - In the slave mode it is the length in spi_clk cycles of dummy phase for read-status operations. The register value shall be (cycle_num-1)."]
56 #[inline(always)]
57 pub fn slv_rdsta_dummy_cyclelen(&mut self) -> SLV_RDSTA_DUMMY_CYCLELEN_W<SLAVE2_SPEC> {
58 SLV_RDSTA_DUMMY_CYCLELEN_W::new(self, 0)
59 }
60 #[doc = "Bits 8:15 - In the slave mode it is the length in spi_clk cycles of dummy phase for write-status operations. The register value shall be (cycle_num-1)."]
61 #[inline(always)]
62 pub fn slv_wrsta_dummy_cyclelen(&mut self) -> SLV_WRSTA_DUMMY_CYCLELEN_W<SLAVE2_SPEC> {
63 SLV_WRSTA_DUMMY_CYCLELEN_W::new(self, 8)
64 }
65 #[doc = "Bits 16:23 - In the slave mode it is the length in spi_clk cycles of dummy phase for read-buffer operations. The register value shall be (cycle_num-1)."]
66 #[inline(always)]
67 pub fn slv_rdbuf_dummy_cyclelen(&mut self) -> SLV_RDBUF_DUMMY_CYCLELEN_W<SLAVE2_SPEC> {
68 SLV_RDBUF_DUMMY_CYCLELEN_W::new(self, 16)
69 }
70 #[doc = "Bits 24:31 - In the slave mode it is the length in spi_clk cycles of dummy phase for write-buffer operations. The register value shall be (cycle_num-1)."]
71 #[inline(always)]
72 pub fn slv_wrbuf_dummy_cyclelen(&mut self) -> SLV_WRBUF_DUMMY_CYCLELEN_W<SLAVE2_SPEC> {
73 SLV_WRBUF_DUMMY_CYCLELEN_W::new(self, 24)
74 }
75}
76#[doc = "\n\nYou can [`read`](crate::Reg::read) this register and get [`slave2::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`slave2::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
77pub struct SLAVE2_SPEC;
78impl crate::RegisterSpec for SLAVE2_SPEC {
79 type Ux = u32;
80}
81#[doc = "`read()` method returns [`slave2::R`](R) reader structure"]
82impl crate::Readable for SLAVE2_SPEC {}
83#[doc = "`write(|w| ..)` method takes [`slave2::W`](W) writer structure"]
84impl crate::Writable for SLAVE2_SPEC {
85 type Safety = crate::Unsafe;
86 const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
87 const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
88}
89#[doc = "`reset()` method sets SLAVE2 to value 0"]
90impl crate::Resettable for SLAVE2_SPEC {
91 const RESET_VALUE: u32 = 0;
92}