1#[doc = "Register `HOST_SLC1HOST_INT_ENA` reader"]
2pub type R = crate::R<HOST_SLC1HOST_INT_ENA_SPEC>;
3#[doc = "Register `HOST_SLC1HOST_INT_ENA` writer"]
4pub type W = crate::W<HOST_SLC1HOST_INT_ENA_SPEC>;
5#[doc = "Field `HOST_SLC1_TOHOST_BIT0_INT_ENA` reader - "]
6pub type HOST_SLC1_TOHOST_BIT0_INT_ENA_R = crate::BitReader;
7#[doc = "Field `HOST_SLC1_TOHOST_BIT0_INT_ENA` writer - "]
8pub type HOST_SLC1_TOHOST_BIT0_INT_ENA_W<'a, REG> = crate::BitWriter<'a, REG>;
9#[doc = "Field `HOST_SLC1_TOHOST_BIT1_INT_ENA` reader - "]
10pub type HOST_SLC1_TOHOST_BIT1_INT_ENA_R = crate::BitReader;
11#[doc = "Field `HOST_SLC1_TOHOST_BIT1_INT_ENA` writer - "]
12pub type HOST_SLC1_TOHOST_BIT1_INT_ENA_W<'a, REG> = crate::BitWriter<'a, REG>;
13#[doc = "Field `HOST_SLC1_TOHOST_BIT2_INT_ENA` reader - "]
14pub type HOST_SLC1_TOHOST_BIT2_INT_ENA_R = crate::BitReader;
15#[doc = "Field `HOST_SLC1_TOHOST_BIT2_INT_ENA` writer - "]
16pub type HOST_SLC1_TOHOST_BIT2_INT_ENA_W<'a, REG> = crate::BitWriter<'a, REG>;
17#[doc = "Field `HOST_SLC1_TOHOST_BIT3_INT_ENA` reader - "]
18pub type HOST_SLC1_TOHOST_BIT3_INT_ENA_R = crate::BitReader;
19#[doc = "Field `HOST_SLC1_TOHOST_BIT3_INT_ENA` writer - "]
20pub type HOST_SLC1_TOHOST_BIT3_INT_ENA_W<'a, REG> = crate::BitWriter<'a, REG>;
21#[doc = "Field `HOST_SLC1_TOHOST_BIT4_INT_ENA` reader - "]
22pub type HOST_SLC1_TOHOST_BIT4_INT_ENA_R = crate::BitReader;
23#[doc = "Field `HOST_SLC1_TOHOST_BIT4_INT_ENA` writer - "]
24pub type HOST_SLC1_TOHOST_BIT4_INT_ENA_W<'a, REG> = crate::BitWriter<'a, REG>;
25#[doc = "Field `HOST_SLC1_TOHOST_BIT5_INT_ENA` reader - "]
26pub type HOST_SLC1_TOHOST_BIT5_INT_ENA_R = crate::BitReader;
27#[doc = "Field `HOST_SLC1_TOHOST_BIT5_INT_ENA` writer - "]
28pub type HOST_SLC1_TOHOST_BIT5_INT_ENA_W<'a, REG> = crate::BitWriter<'a, REG>;
29#[doc = "Field `HOST_SLC1_TOHOST_BIT6_INT_ENA` reader - "]
30pub type HOST_SLC1_TOHOST_BIT6_INT_ENA_R = crate::BitReader;
31#[doc = "Field `HOST_SLC1_TOHOST_BIT6_INT_ENA` writer - "]
32pub type HOST_SLC1_TOHOST_BIT6_INT_ENA_W<'a, REG> = crate::BitWriter<'a, REG>;
33#[doc = "Field `HOST_SLC1_TOHOST_BIT7_INT_ENA` reader - "]
34pub type HOST_SLC1_TOHOST_BIT7_INT_ENA_R = crate::BitReader;
35#[doc = "Field `HOST_SLC1_TOHOST_BIT7_INT_ENA` writer - "]
36pub type HOST_SLC1_TOHOST_BIT7_INT_ENA_W<'a, REG> = crate::BitWriter<'a, REG>;
37#[doc = "Field `HOST_SLC1_TOKEN0_1TO0_INT_ENA` reader - "]
38pub type HOST_SLC1_TOKEN0_1TO0_INT_ENA_R = crate::BitReader;
39#[doc = "Field `HOST_SLC1_TOKEN0_1TO0_INT_ENA` writer - "]
40pub type HOST_SLC1_TOKEN0_1TO0_INT_ENA_W<'a, REG> = crate::BitWriter<'a, REG>;
41#[doc = "Field `HOST_SLC1_TOKEN1_1TO0_INT_ENA` reader - "]
42pub type HOST_SLC1_TOKEN1_1TO0_INT_ENA_R = crate::BitReader;
43#[doc = "Field `HOST_SLC1_TOKEN1_1TO0_INT_ENA` writer - "]
44pub type HOST_SLC1_TOKEN1_1TO0_INT_ENA_W<'a, REG> = crate::BitWriter<'a, REG>;
45#[doc = "Field `HOST_SLC1_TOKEN0_0TO1_INT_ENA` reader - "]
46pub type HOST_SLC1_TOKEN0_0TO1_INT_ENA_R = crate::BitReader;
47#[doc = "Field `HOST_SLC1_TOKEN0_0TO1_INT_ENA` writer - "]
48pub type HOST_SLC1_TOKEN0_0TO1_INT_ENA_W<'a, REG> = crate::BitWriter<'a, REG>;
49#[doc = "Field `HOST_SLC1_TOKEN1_0TO1_INT_ENA` reader - "]
50pub type HOST_SLC1_TOKEN1_0TO1_INT_ENA_R = crate::BitReader;
51#[doc = "Field `HOST_SLC1_TOKEN1_0TO1_INT_ENA` writer - "]
52pub type HOST_SLC1_TOKEN1_0TO1_INT_ENA_W<'a, REG> = crate::BitWriter<'a, REG>;
53#[doc = "Field `HOST_SLC1HOST_RX_SOF_INT_ENA` reader - "]
54pub type HOST_SLC1HOST_RX_SOF_INT_ENA_R = crate::BitReader;
55#[doc = "Field `HOST_SLC1HOST_RX_SOF_INT_ENA` writer - "]
56pub type HOST_SLC1HOST_RX_SOF_INT_ENA_W<'a, REG> = crate::BitWriter<'a, REG>;
57#[doc = "Field `HOST_SLC1HOST_RX_EOF_INT_ENA` reader - "]
58pub type HOST_SLC1HOST_RX_EOF_INT_ENA_R = crate::BitReader;
59#[doc = "Field `HOST_SLC1HOST_RX_EOF_INT_ENA` writer - "]
60pub type HOST_SLC1HOST_RX_EOF_INT_ENA_W<'a, REG> = crate::BitWriter<'a, REG>;
61#[doc = "Field `HOST_SLC1HOST_RX_START_INT_ENA` reader - "]
62pub type HOST_SLC1HOST_RX_START_INT_ENA_R = crate::BitReader;
63#[doc = "Field `HOST_SLC1HOST_RX_START_INT_ENA` writer - "]
64pub type HOST_SLC1HOST_RX_START_INT_ENA_W<'a, REG> = crate::BitWriter<'a, REG>;
65#[doc = "Field `HOST_SLC1HOST_TX_START_INT_ENA` reader - "]
66pub type HOST_SLC1HOST_TX_START_INT_ENA_R = crate::BitReader;
67#[doc = "Field `HOST_SLC1HOST_TX_START_INT_ENA` writer - "]
68pub type HOST_SLC1HOST_TX_START_INT_ENA_W<'a, REG> = crate::BitWriter<'a, REG>;
69#[doc = "Field `HOST_SLC1_RX_UDF_INT_ENA` reader - "]
70pub type HOST_SLC1_RX_UDF_INT_ENA_R = crate::BitReader;
71#[doc = "Field `HOST_SLC1_RX_UDF_INT_ENA` writer - "]
72pub type HOST_SLC1_RX_UDF_INT_ENA_W<'a, REG> = crate::BitWriter<'a, REG>;
73#[doc = "Field `HOST_SLC1_TX_OVF_INT_ENA` reader - "]
74pub type HOST_SLC1_TX_OVF_INT_ENA_R = crate::BitReader;
75#[doc = "Field `HOST_SLC1_TX_OVF_INT_ENA` writer - "]
76pub type HOST_SLC1_TX_OVF_INT_ENA_W<'a, REG> = crate::BitWriter<'a, REG>;
77#[doc = "Field `HOST_SLC1_RX_PF_VALID_INT_ENA` reader - "]
78pub type HOST_SLC1_RX_PF_VALID_INT_ENA_R = crate::BitReader;
79#[doc = "Field `HOST_SLC1_RX_PF_VALID_INT_ENA` writer - "]
80pub type HOST_SLC1_RX_PF_VALID_INT_ENA_W<'a, REG> = crate::BitWriter<'a, REG>;
81#[doc = "Field `HOST_SLC1_EXT_BIT0_INT_ENA` reader - "]
82pub type HOST_SLC1_EXT_BIT0_INT_ENA_R = crate::BitReader;
83#[doc = "Field `HOST_SLC1_EXT_BIT0_INT_ENA` writer - "]
84pub type HOST_SLC1_EXT_BIT0_INT_ENA_W<'a, REG> = crate::BitWriter<'a, REG>;
85#[doc = "Field `HOST_SLC1_EXT_BIT1_INT_ENA` reader - "]
86pub type HOST_SLC1_EXT_BIT1_INT_ENA_R = crate::BitReader;
87#[doc = "Field `HOST_SLC1_EXT_BIT1_INT_ENA` writer - "]
88pub type HOST_SLC1_EXT_BIT1_INT_ENA_W<'a, REG> = crate::BitWriter<'a, REG>;
89#[doc = "Field `HOST_SLC1_EXT_BIT2_INT_ENA` reader - "]
90pub type HOST_SLC1_EXT_BIT2_INT_ENA_R = crate::BitReader;
91#[doc = "Field `HOST_SLC1_EXT_BIT2_INT_ENA` writer - "]
92pub type HOST_SLC1_EXT_BIT2_INT_ENA_W<'a, REG> = crate::BitWriter<'a, REG>;
93#[doc = "Field `HOST_SLC1_EXT_BIT3_INT_ENA` reader - "]
94pub type HOST_SLC1_EXT_BIT3_INT_ENA_R = crate::BitReader;
95#[doc = "Field `HOST_SLC1_EXT_BIT3_INT_ENA` writer - "]
96pub type HOST_SLC1_EXT_BIT3_INT_ENA_W<'a, REG> = crate::BitWriter<'a, REG>;
97#[doc = "Field `HOST_SLC1_WIFI_RX_NEW_PACKET_INT_ENA` reader - "]
98pub type HOST_SLC1_WIFI_RX_NEW_PACKET_INT_ENA_R = crate::BitReader;
99#[doc = "Field `HOST_SLC1_WIFI_RX_NEW_PACKET_INT_ENA` writer - "]
100pub type HOST_SLC1_WIFI_RX_NEW_PACKET_INT_ENA_W<'a, REG> = crate::BitWriter<'a, REG>;
101#[doc = "Field `HOST_SLC1_HOST_RD_RETRY_INT_ENA` reader - "]
102pub type HOST_SLC1_HOST_RD_RETRY_INT_ENA_R = crate::BitReader;
103#[doc = "Field `HOST_SLC1_HOST_RD_RETRY_INT_ENA` writer - "]
104pub type HOST_SLC1_HOST_RD_RETRY_INT_ENA_W<'a, REG> = crate::BitWriter<'a, REG>;
105#[doc = "Field `HOST_SLC1_BT_RX_NEW_PACKET_INT_ENA` reader - "]
106pub type HOST_SLC1_BT_RX_NEW_PACKET_INT_ENA_R = crate::BitReader;
107#[doc = "Field `HOST_SLC1_BT_RX_NEW_PACKET_INT_ENA` writer - "]
108pub type HOST_SLC1_BT_RX_NEW_PACKET_INT_ENA_W<'a, REG> = crate::BitWriter<'a, REG>;
109impl R {
110 #[doc = "Bit 0"]
111 #[inline(always)]
112 pub fn host_slc1_tohost_bit0_int_ena(&self) -> HOST_SLC1_TOHOST_BIT0_INT_ENA_R {
113 HOST_SLC1_TOHOST_BIT0_INT_ENA_R::new((self.bits & 1) != 0)
114 }
115 #[doc = "Bit 1"]
116 #[inline(always)]
117 pub fn host_slc1_tohost_bit1_int_ena(&self) -> HOST_SLC1_TOHOST_BIT1_INT_ENA_R {
118 HOST_SLC1_TOHOST_BIT1_INT_ENA_R::new(((self.bits >> 1) & 1) != 0)
119 }
120 #[doc = "Bit 2"]
121 #[inline(always)]
122 pub fn host_slc1_tohost_bit2_int_ena(&self) -> HOST_SLC1_TOHOST_BIT2_INT_ENA_R {
123 HOST_SLC1_TOHOST_BIT2_INT_ENA_R::new(((self.bits >> 2) & 1) != 0)
124 }
125 #[doc = "Bit 3"]
126 #[inline(always)]
127 pub fn host_slc1_tohost_bit3_int_ena(&self) -> HOST_SLC1_TOHOST_BIT3_INT_ENA_R {
128 HOST_SLC1_TOHOST_BIT3_INT_ENA_R::new(((self.bits >> 3) & 1) != 0)
129 }
130 #[doc = "Bit 4"]
131 #[inline(always)]
132 pub fn host_slc1_tohost_bit4_int_ena(&self) -> HOST_SLC1_TOHOST_BIT4_INT_ENA_R {
133 HOST_SLC1_TOHOST_BIT4_INT_ENA_R::new(((self.bits >> 4) & 1) != 0)
134 }
135 #[doc = "Bit 5"]
136 #[inline(always)]
137 pub fn host_slc1_tohost_bit5_int_ena(&self) -> HOST_SLC1_TOHOST_BIT5_INT_ENA_R {
138 HOST_SLC1_TOHOST_BIT5_INT_ENA_R::new(((self.bits >> 5) & 1) != 0)
139 }
140 #[doc = "Bit 6"]
141 #[inline(always)]
142 pub fn host_slc1_tohost_bit6_int_ena(&self) -> HOST_SLC1_TOHOST_BIT6_INT_ENA_R {
143 HOST_SLC1_TOHOST_BIT6_INT_ENA_R::new(((self.bits >> 6) & 1) != 0)
144 }
145 #[doc = "Bit 7"]
146 #[inline(always)]
147 pub fn host_slc1_tohost_bit7_int_ena(&self) -> HOST_SLC1_TOHOST_BIT7_INT_ENA_R {
148 HOST_SLC1_TOHOST_BIT7_INT_ENA_R::new(((self.bits >> 7) & 1) != 0)
149 }
150 #[doc = "Bit 8"]
151 #[inline(always)]
152 pub fn host_slc1_token0_1to0_int_ena(&self) -> HOST_SLC1_TOKEN0_1TO0_INT_ENA_R {
153 HOST_SLC1_TOKEN0_1TO0_INT_ENA_R::new(((self.bits >> 8) & 1) != 0)
154 }
155 #[doc = "Bit 9"]
156 #[inline(always)]
157 pub fn host_slc1_token1_1to0_int_ena(&self) -> HOST_SLC1_TOKEN1_1TO0_INT_ENA_R {
158 HOST_SLC1_TOKEN1_1TO0_INT_ENA_R::new(((self.bits >> 9) & 1) != 0)
159 }
160 #[doc = "Bit 10"]
161 #[inline(always)]
162 pub fn host_slc1_token0_0to1_int_ena(&self) -> HOST_SLC1_TOKEN0_0TO1_INT_ENA_R {
163 HOST_SLC1_TOKEN0_0TO1_INT_ENA_R::new(((self.bits >> 10) & 1) != 0)
164 }
165 #[doc = "Bit 11"]
166 #[inline(always)]
167 pub fn host_slc1_token1_0to1_int_ena(&self) -> HOST_SLC1_TOKEN1_0TO1_INT_ENA_R {
168 HOST_SLC1_TOKEN1_0TO1_INT_ENA_R::new(((self.bits >> 11) & 1) != 0)
169 }
170 #[doc = "Bit 12"]
171 #[inline(always)]
172 pub fn host_slc1host_rx_sof_int_ena(&self) -> HOST_SLC1HOST_RX_SOF_INT_ENA_R {
173 HOST_SLC1HOST_RX_SOF_INT_ENA_R::new(((self.bits >> 12) & 1) != 0)
174 }
175 #[doc = "Bit 13"]
176 #[inline(always)]
177 pub fn host_slc1host_rx_eof_int_ena(&self) -> HOST_SLC1HOST_RX_EOF_INT_ENA_R {
178 HOST_SLC1HOST_RX_EOF_INT_ENA_R::new(((self.bits >> 13) & 1) != 0)
179 }
180 #[doc = "Bit 14"]
181 #[inline(always)]
182 pub fn host_slc1host_rx_start_int_ena(&self) -> HOST_SLC1HOST_RX_START_INT_ENA_R {
183 HOST_SLC1HOST_RX_START_INT_ENA_R::new(((self.bits >> 14) & 1) != 0)
184 }
185 #[doc = "Bit 15"]
186 #[inline(always)]
187 pub fn host_slc1host_tx_start_int_ena(&self) -> HOST_SLC1HOST_TX_START_INT_ENA_R {
188 HOST_SLC1HOST_TX_START_INT_ENA_R::new(((self.bits >> 15) & 1) != 0)
189 }
190 #[doc = "Bit 16"]
191 #[inline(always)]
192 pub fn host_slc1_rx_udf_int_ena(&self) -> HOST_SLC1_RX_UDF_INT_ENA_R {
193 HOST_SLC1_RX_UDF_INT_ENA_R::new(((self.bits >> 16) & 1) != 0)
194 }
195 #[doc = "Bit 17"]
196 #[inline(always)]
197 pub fn host_slc1_tx_ovf_int_ena(&self) -> HOST_SLC1_TX_OVF_INT_ENA_R {
198 HOST_SLC1_TX_OVF_INT_ENA_R::new(((self.bits >> 17) & 1) != 0)
199 }
200 #[doc = "Bit 18"]
201 #[inline(always)]
202 pub fn host_slc1_rx_pf_valid_int_ena(&self) -> HOST_SLC1_RX_PF_VALID_INT_ENA_R {
203 HOST_SLC1_RX_PF_VALID_INT_ENA_R::new(((self.bits >> 18) & 1) != 0)
204 }
205 #[doc = "Bit 19"]
206 #[inline(always)]
207 pub fn host_slc1_ext_bit0_int_ena(&self) -> HOST_SLC1_EXT_BIT0_INT_ENA_R {
208 HOST_SLC1_EXT_BIT0_INT_ENA_R::new(((self.bits >> 19) & 1) != 0)
209 }
210 #[doc = "Bit 20"]
211 #[inline(always)]
212 pub fn host_slc1_ext_bit1_int_ena(&self) -> HOST_SLC1_EXT_BIT1_INT_ENA_R {
213 HOST_SLC1_EXT_BIT1_INT_ENA_R::new(((self.bits >> 20) & 1) != 0)
214 }
215 #[doc = "Bit 21"]
216 #[inline(always)]
217 pub fn host_slc1_ext_bit2_int_ena(&self) -> HOST_SLC1_EXT_BIT2_INT_ENA_R {
218 HOST_SLC1_EXT_BIT2_INT_ENA_R::new(((self.bits >> 21) & 1) != 0)
219 }
220 #[doc = "Bit 22"]
221 #[inline(always)]
222 pub fn host_slc1_ext_bit3_int_ena(&self) -> HOST_SLC1_EXT_BIT3_INT_ENA_R {
223 HOST_SLC1_EXT_BIT3_INT_ENA_R::new(((self.bits >> 22) & 1) != 0)
224 }
225 #[doc = "Bit 23"]
226 #[inline(always)]
227 pub fn host_slc1_wifi_rx_new_packet_int_ena(&self) -> HOST_SLC1_WIFI_RX_NEW_PACKET_INT_ENA_R {
228 HOST_SLC1_WIFI_RX_NEW_PACKET_INT_ENA_R::new(((self.bits >> 23) & 1) != 0)
229 }
230 #[doc = "Bit 24"]
231 #[inline(always)]
232 pub fn host_slc1_host_rd_retry_int_ena(&self) -> HOST_SLC1_HOST_RD_RETRY_INT_ENA_R {
233 HOST_SLC1_HOST_RD_RETRY_INT_ENA_R::new(((self.bits >> 24) & 1) != 0)
234 }
235 #[doc = "Bit 25"]
236 #[inline(always)]
237 pub fn host_slc1_bt_rx_new_packet_int_ena(&self) -> HOST_SLC1_BT_RX_NEW_PACKET_INT_ENA_R {
238 HOST_SLC1_BT_RX_NEW_PACKET_INT_ENA_R::new(((self.bits >> 25) & 1) != 0)
239 }
240}
241#[cfg(feature = "impl-register-debug")]
242impl core::fmt::Debug for R {
243 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
244 f.debug_struct("HOST_SLC1HOST_INT_ENA")
245 .field(
246 "host_slc1_tohost_bit0_int_ena",
247 &self.host_slc1_tohost_bit0_int_ena(),
248 )
249 .field(
250 "host_slc1_tohost_bit1_int_ena",
251 &self.host_slc1_tohost_bit1_int_ena(),
252 )
253 .field(
254 "host_slc1_tohost_bit2_int_ena",
255 &self.host_slc1_tohost_bit2_int_ena(),
256 )
257 .field(
258 "host_slc1_tohost_bit3_int_ena",
259 &self.host_slc1_tohost_bit3_int_ena(),
260 )
261 .field(
262 "host_slc1_tohost_bit4_int_ena",
263 &self.host_slc1_tohost_bit4_int_ena(),
264 )
265 .field(
266 "host_slc1_tohost_bit5_int_ena",
267 &self.host_slc1_tohost_bit5_int_ena(),
268 )
269 .field(
270 "host_slc1_tohost_bit6_int_ena",
271 &self.host_slc1_tohost_bit6_int_ena(),
272 )
273 .field(
274 "host_slc1_tohost_bit7_int_ena",
275 &self.host_slc1_tohost_bit7_int_ena(),
276 )
277 .field(
278 "host_slc1_token0_1to0_int_ena",
279 &self.host_slc1_token0_1to0_int_ena(),
280 )
281 .field(
282 "host_slc1_token1_1to0_int_ena",
283 &self.host_slc1_token1_1to0_int_ena(),
284 )
285 .field(
286 "host_slc1_token0_0to1_int_ena",
287 &self.host_slc1_token0_0to1_int_ena(),
288 )
289 .field(
290 "host_slc1_token1_0to1_int_ena",
291 &self.host_slc1_token1_0to1_int_ena(),
292 )
293 .field(
294 "host_slc1host_rx_sof_int_ena",
295 &self.host_slc1host_rx_sof_int_ena(),
296 )
297 .field(
298 "host_slc1host_rx_eof_int_ena",
299 &self.host_slc1host_rx_eof_int_ena(),
300 )
301 .field(
302 "host_slc1host_rx_start_int_ena",
303 &self.host_slc1host_rx_start_int_ena(),
304 )
305 .field(
306 "host_slc1host_tx_start_int_ena",
307 &self.host_slc1host_tx_start_int_ena(),
308 )
309 .field("host_slc1_rx_udf_int_ena", &self.host_slc1_rx_udf_int_ena())
310 .field("host_slc1_tx_ovf_int_ena", &self.host_slc1_tx_ovf_int_ena())
311 .field(
312 "host_slc1_rx_pf_valid_int_ena",
313 &self.host_slc1_rx_pf_valid_int_ena(),
314 )
315 .field(
316 "host_slc1_ext_bit0_int_ena",
317 &self.host_slc1_ext_bit0_int_ena(),
318 )
319 .field(
320 "host_slc1_ext_bit1_int_ena",
321 &self.host_slc1_ext_bit1_int_ena(),
322 )
323 .field(
324 "host_slc1_ext_bit2_int_ena",
325 &self.host_slc1_ext_bit2_int_ena(),
326 )
327 .field(
328 "host_slc1_ext_bit3_int_ena",
329 &self.host_slc1_ext_bit3_int_ena(),
330 )
331 .field(
332 "host_slc1_wifi_rx_new_packet_int_ena",
333 &self.host_slc1_wifi_rx_new_packet_int_ena(),
334 )
335 .field(
336 "host_slc1_host_rd_retry_int_ena",
337 &self.host_slc1_host_rd_retry_int_ena(),
338 )
339 .field(
340 "host_slc1_bt_rx_new_packet_int_ena",
341 &self.host_slc1_bt_rx_new_packet_int_ena(),
342 )
343 .finish()
344 }
345}
346impl W {
347 #[doc = "Bit 0"]
348 #[inline(always)]
349 pub fn host_slc1_tohost_bit0_int_ena(
350 &mut self,
351 ) -> HOST_SLC1_TOHOST_BIT0_INT_ENA_W<HOST_SLC1HOST_INT_ENA_SPEC> {
352 HOST_SLC1_TOHOST_BIT0_INT_ENA_W::new(self, 0)
353 }
354 #[doc = "Bit 1"]
355 #[inline(always)]
356 pub fn host_slc1_tohost_bit1_int_ena(
357 &mut self,
358 ) -> HOST_SLC1_TOHOST_BIT1_INT_ENA_W<HOST_SLC1HOST_INT_ENA_SPEC> {
359 HOST_SLC1_TOHOST_BIT1_INT_ENA_W::new(self, 1)
360 }
361 #[doc = "Bit 2"]
362 #[inline(always)]
363 pub fn host_slc1_tohost_bit2_int_ena(
364 &mut self,
365 ) -> HOST_SLC1_TOHOST_BIT2_INT_ENA_W<HOST_SLC1HOST_INT_ENA_SPEC> {
366 HOST_SLC1_TOHOST_BIT2_INT_ENA_W::new(self, 2)
367 }
368 #[doc = "Bit 3"]
369 #[inline(always)]
370 pub fn host_slc1_tohost_bit3_int_ena(
371 &mut self,
372 ) -> HOST_SLC1_TOHOST_BIT3_INT_ENA_W<HOST_SLC1HOST_INT_ENA_SPEC> {
373 HOST_SLC1_TOHOST_BIT3_INT_ENA_W::new(self, 3)
374 }
375 #[doc = "Bit 4"]
376 #[inline(always)]
377 pub fn host_slc1_tohost_bit4_int_ena(
378 &mut self,
379 ) -> HOST_SLC1_TOHOST_BIT4_INT_ENA_W<HOST_SLC1HOST_INT_ENA_SPEC> {
380 HOST_SLC1_TOHOST_BIT4_INT_ENA_W::new(self, 4)
381 }
382 #[doc = "Bit 5"]
383 #[inline(always)]
384 pub fn host_slc1_tohost_bit5_int_ena(
385 &mut self,
386 ) -> HOST_SLC1_TOHOST_BIT5_INT_ENA_W<HOST_SLC1HOST_INT_ENA_SPEC> {
387 HOST_SLC1_TOHOST_BIT5_INT_ENA_W::new(self, 5)
388 }
389 #[doc = "Bit 6"]
390 #[inline(always)]
391 pub fn host_slc1_tohost_bit6_int_ena(
392 &mut self,
393 ) -> HOST_SLC1_TOHOST_BIT6_INT_ENA_W<HOST_SLC1HOST_INT_ENA_SPEC> {
394 HOST_SLC1_TOHOST_BIT6_INT_ENA_W::new(self, 6)
395 }
396 #[doc = "Bit 7"]
397 #[inline(always)]
398 pub fn host_slc1_tohost_bit7_int_ena(
399 &mut self,
400 ) -> HOST_SLC1_TOHOST_BIT7_INT_ENA_W<HOST_SLC1HOST_INT_ENA_SPEC> {
401 HOST_SLC1_TOHOST_BIT7_INT_ENA_W::new(self, 7)
402 }
403 #[doc = "Bit 8"]
404 #[inline(always)]
405 pub fn host_slc1_token0_1to0_int_ena(
406 &mut self,
407 ) -> HOST_SLC1_TOKEN0_1TO0_INT_ENA_W<HOST_SLC1HOST_INT_ENA_SPEC> {
408 HOST_SLC1_TOKEN0_1TO0_INT_ENA_W::new(self, 8)
409 }
410 #[doc = "Bit 9"]
411 #[inline(always)]
412 pub fn host_slc1_token1_1to0_int_ena(
413 &mut self,
414 ) -> HOST_SLC1_TOKEN1_1TO0_INT_ENA_W<HOST_SLC1HOST_INT_ENA_SPEC> {
415 HOST_SLC1_TOKEN1_1TO0_INT_ENA_W::new(self, 9)
416 }
417 #[doc = "Bit 10"]
418 #[inline(always)]
419 pub fn host_slc1_token0_0to1_int_ena(
420 &mut self,
421 ) -> HOST_SLC1_TOKEN0_0TO1_INT_ENA_W<HOST_SLC1HOST_INT_ENA_SPEC> {
422 HOST_SLC1_TOKEN0_0TO1_INT_ENA_W::new(self, 10)
423 }
424 #[doc = "Bit 11"]
425 #[inline(always)]
426 pub fn host_slc1_token1_0to1_int_ena(
427 &mut self,
428 ) -> HOST_SLC1_TOKEN1_0TO1_INT_ENA_W<HOST_SLC1HOST_INT_ENA_SPEC> {
429 HOST_SLC1_TOKEN1_0TO1_INT_ENA_W::new(self, 11)
430 }
431 #[doc = "Bit 12"]
432 #[inline(always)]
433 pub fn host_slc1host_rx_sof_int_ena(
434 &mut self,
435 ) -> HOST_SLC1HOST_RX_SOF_INT_ENA_W<HOST_SLC1HOST_INT_ENA_SPEC> {
436 HOST_SLC1HOST_RX_SOF_INT_ENA_W::new(self, 12)
437 }
438 #[doc = "Bit 13"]
439 #[inline(always)]
440 pub fn host_slc1host_rx_eof_int_ena(
441 &mut self,
442 ) -> HOST_SLC1HOST_RX_EOF_INT_ENA_W<HOST_SLC1HOST_INT_ENA_SPEC> {
443 HOST_SLC1HOST_RX_EOF_INT_ENA_W::new(self, 13)
444 }
445 #[doc = "Bit 14"]
446 #[inline(always)]
447 pub fn host_slc1host_rx_start_int_ena(
448 &mut self,
449 ) -> HOST_SLC1HOST_RX_START_INT_ENA_W<HOST_SLC1HOST_INT_ENA_SPEC> {
450 HOST_SLC1HOST_RX_START_INT_ENA_W::new(self, 14)
451 }
452 #[doc = "Bit 15"]
453 #[inline(always)]
454 pub fn host_slc1host_tx_start_int_ena(
455 &mut self,
456 ) -> HOST_SLC1HOST_TX_START_INT_ENA_W<HOST_SLC1HOST_INT_ENA_SPEC> {
457 HOST_SLC1HOST_TX_START_INT_ENA_W::new(self, 15)
458 }
459 #[doc = "Bit 16"]
460 #[inline(always)]
461 pub fn host_slc1_rx_udf_int_ena(
462 &mut self,
463 ) -> HOST_SLC1_RX_UDF_INT_ENA_W<HOST_SLC1HOST_INT_ENA_SPEC> {
464 HOST_SLC1_RX_UDF_INT_ENA_W::new(self, 16)
465 }
466 #[doc = "Bit 17"]
467 #[inline(always)]
468 pub fn host_slc1_tx_ovf_int_ena(
469 &mut self,
470 ) -> HOST_SLC1_TX_OVF_INT_ENA_W<HOST_SLC1HOST_INT_ENA_SPEC> {
471 HOST_SLC1_TX_OVF_INT_ENA_W::new(self, 17)
472 }
473 #[doc = "Bit 18"]
474 #[inline(always)]
475 pub fn host_slc1_rx_pf_valid_int_ena(
476 &mut self,
477 ) -> HOST_SLC1_RX_PF_VALID_INT_ENA_W<HOST_SLC1HOST_INT_ENA_SPEC> {
478 HOST_SLC1_RX_PF_VALID_INT_ENA_W::new(self, 18)
479 }
480 #[doc = "Bit 19"]
481 #[inline(always)]
482 pub fn host_slc1_ext_bit0_int_ena(
483 &mut self,
484 ) -> HOST_SLC1_EXT_BIT0_INT_ENA_W<HOST_SLC1HOST_INT_ENA_SPEC> {
485 HOST_SLC1_EXT_BIT0_INT_ENA_W::new(self, 19)
486 }
487 #[doc = "Bit 20"]
488 #[inline(always)]
489 pub fn host_slc1_ext_bit1_int_ena(
490 &mut self,
491 ) -> HOST_SLC1_EXT_BIT1_INT_ENA_W<HOST_SLC1HOST_INT_ENA_SPEC> {
492 HOST_SLC1_EXT_BIT1_INT_ENA_W::new(self, 20)
493 }
494 #[doc = "Bit 21"]
495 #[inline(always)]
496 pub fn host_slc1_ext_bit2_int_ena(
497 &mut self,
498 ) -> HOST_SLC1_EXT_BIT2_INT_ENA_W<HOST_SLC1HOST_INT_ENA_SPEC> {
499 HOST_SLC1_EXT_BIT2_INT_ENA_W::new(self, 21)
500 }
501 #[doc = "Bit 22"]
502 #[inline(always)]
503 pub fn host_slc1_ext_bit3_int_ena(
504 &mut self,
505 ) -> HOST_SLC1_EXT_BIT3_INT_ENA_W<HOST_SLC1HOST_INT_ENA_SPEC> {
506 HOST_SLC1_EXT_BIT3_INT_ENA_W::new(self, 22)
507 }
508 #[doc = "Bit 23"]
509 #[inline(always)]
510 pub fn host_slc1_wifi_rx_new_packet_int_ena(
511 &mut self,
512 ) -> HOST_SLC1_WIFI_RX_NEW_PACKET_INT_ENA_W<HOST_SLC1HOST_INT_ENA_SPEC> {
513 HOST_SLC1_WIFI_RX_NEW_PACKET_INT_ENA_W::new(self, 23)
514 }
515 #[doc = "Bit 24"]
516 #[inline(always)]
517 pub fn host_slc1_host_rd_retry_int_ena(
518 &mut self,
519 ) -> HOST_SLC1_HOST_RD_RETRY_INT_ENA_W<HOST_SLC1HOST_INT_ENA_SPEC> {
520 HOST_SLC1_HOST_RD_RETRY_INT_ENA_W::new(self, 24)
521 }
522 #[doc = "Bit 25"]
523 #[inline(always)]
524 pub fn host_slc1_bt_rx_new_packet_int_ena(
525 &mut self,
526 ) -> HOST_SLC1_BT_RX_NEW_PACKET_INT_ENA_W<HOST_SLC1HOST_INT_ENA_SPEC> {
527 HOST_SLC1_BT_RX_NEW_PACKET_INT_ENA_W::new(self, 25)
528 }
529}
530#[doc = "\n\nYou can [`read`](crate::Reg::read) this register and get [`host_slc1host_int_ena::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`host_slc1host_int_ena::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
531pub struct HOST_SLC1HOST_INT_ENA_SPEC;
532impl crate::RegisterSpec for HOST_SLC1HOST_INT_ENA_SPEC {
533 type Ux = u32;
534}
535#[doc = "`read()` method returns [`host_slc1host_int_ena::R`](R) reader structure"]
536impl crate::Readable for HOST_SLC1HOST_INT_ENA_SPEC {}
537#[doc = "`write(|w| ..)` method takes [`host_slc1host_int_ena::W`](W) writer structure"]
538impl crate::Writable for HOST_SLC1HOST_INT_ENA_SPEC {
539 type Safety = crate::Unsafe;
540 const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
541 const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
542}
543#[doc = "`reset()` method sets HOST_SLC1HOST_INT_ENA to value 0"]
544impl crate::Resettable for HOST_SLC1HOST_INT_ENA_SPEC {
545 const RESET_VALUE: u32 = 0;
546}