esp32/sens/
ulp_cp_sleep_cyc3.rs1#[doc = "Register `ULP_CP_SLEEP_CYC3` reader"]
2pub type R = crate::R<ULP_CP_SLEEP_CYC3_SPEC>;
3#[doc = "Register `ULP_CP_SLEEP_CYC3` writer"]
4pub type W = crate::W<ULP_CP_SLEEP_CYC3_SPEC>;
5#[doc = "Field `SLEEP_CYCLES_S3` reader - "]
6pub type SLEEP_CYCLES_S3_R = crate::FieldReader<u32>;
7#[doc = "Field `SLEEP_CYCLES_S3` writer - "]
8pub type SLEEP_CYCLES_S3_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>;
9impl R {
10 #[doc = "Bits 0:31"]
11 #[inline(always)]
12 pub fn sleep_cycles_s3(&self) -> SLEEP_CYCLES_S3_R {
13 SLEEP_CYCLES_S3_R::new(self.bits)
14 }
15}
16#[cfg(feature = "impl-register-debug")]
17impl core::fmt::Debug for R {
18 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
19 f.debug_struct("ULP_CP_SLEEP_CYC3")
20 .field("sleep_cycles_s3", &self.sleep_cycles_s3())
21 .finish()
22 }
23}
24impl W {
25 #[doc = "Bits 0:31"]
26 #[inline(always)]
27 pub fn sleep_cycles_s3(&mut self) -> SLEEP_CYCLES_S3_W<ULP_CP_SLEEP_CYC3_SPEC> {
28 SLEEP_CYCLES_S3_W::new(self, 0)
29 }
30}
31#[doc = "\n\nYou can [`read`](crate::Reg::read) this register and get [`ulp_cp_sleep_cyc3::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ulp_cp_sleep_cyc3::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
32pub struct ULP_CP_SLEEP_CYC3_SPEC;
33impl crate::RegisterSpec for ULP_CP_SLEEP_CYC3_SPEC {
34 type Ux = u32;
35}
36#[doc = "`read()` method returns [`ulp_cp_sleep_cyc3::R`](R) reader structure"]
37impl crate::Readable for ULP_CP_SLEEP_CYC3_SPEC {}
38#[doc = "`write(|w| ..)` method takes [`ulp_cp_sleep_cyc3::W`](W) writer structure"]
39impl crate::Writable for ULP_CP_SLEEP_CYC3_SPEC {
40 type Safety = crate::Unsafe;
41 const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
42 const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
43}
44#[doc = "`reset()` method sets ULP_CP_SLEEP_CYC3 to value 0x28"]
45impl crate::Resettable for ULP_CP_SLEEP_CYC3_SPEC {
46 const RESET_VALUE: u32 = 0x28;
47}