esp32/sens/
sar_meas_start1.rs1#[doc = "Register `SAR_MEAS_START1` reader"]
2pub type R = crate::R<SAR_MEAS_START1_SPEC>;
3#[doc = "Register `SAR_MEAS_START1` writer"]
4pub type W = crate::W<SAR_MEAS_START1_SPEC>;
5#[doc = "Field `MEAS1_DATA_SAR` reader - SAR ADC1 data"]
6pub type MEAS1_DATA_SAR_R = crate::FieldReader<u16>;
7#[doc = "Field `MEAS1_DONE_SAR` reader - SAR ADC1 conversion done indication"]
8pub type MEAS1_DONE_SAR_R = crate::BitReader;
9#[doc = "Field `MEAS1_START_SAR` reader - SAR ADC1 controller (in RTC) starts conversion only active when reg_meas1_start_force = 1"]
10pub type MEAS1_START_SAR_R = crate::BitReader;
11#[doc = "Field `MEAS1_START_SAR` writer - SAR ADC1 controller (in RTC) starts conversion only active when reg_meas1_start_force = 1"]
12pub type MEAS1_START_SAR_W<'a, REG> = crate::BitWriter<'a, REG>;
13#[doc = "Field `MEAS1_START_FORCE` reader - 1: SAR ADC1 controller (in RTC) is started by SW 0: SAR ADC1 controller is started by ULP-coprocessor"]
14pub type MEAS1_START_FORCE_R = crate::BitReader;
15#[doc = "Field `MEAS1_START_FORCE` writer - 1: SAR ADC1 controller (in RTC) is started by SW 0: SAR ADC1 controller is started by ULP-coprocessor"]
16pub type MEAS1_START_FORCE_W<'a, REG> = crate::BitWriter<'a, REG>;
17#[doc = "Field `SAR1_EN_PAD` reader - SAR ADC1 pad enable bitmap only active when reg_sar1_en_pad_force = 1"]
18pub type SAR1_EN_PAD_R = crate::FieldReader<u16>;
19#[doc = "Field `SAR1_EN_PAD` writer - SAR ADC1 pad enable bitmap only active when reg_sar1_en_pad_force = 1"]
20pub type SAR1_EN_PAD_W<'a, REG> = crate::FieldWriter<'a, REG, 12, u16>;
21#[doc = "Field `SAR1_EN_PAD_FORCE` reader - 1: SAR ADC1 pad enable bitmap is controlled by SW 0: SAR ADC1 pad enable bitmap is controlled by ULP-coprocessor"]
22pub type SAR1_EN_PAD_FORCE_R = crate::BitReader;
23#[doc = "Field `SAR1_EN_PAD_FORCE` writer - 1: SAR ADC1 pad enable bitmap is controlled by SW 0: SAR ADC1 pad enable bitmap is controlled by ULP-coprocessor"]
24pub type SAR1_EN_PAD_FORCE_W<'a, REG> = crate::BitWriter<'a, REG>;
25impl R {
26 #[doc = "Bits 0:15 - SAR ADC1 data"]
27 #[inline(always)]
28 pub fn meas1_data_sar(&self) -> MEAS1_DATA_SAR_R {
29 MEAS1_DATA_SAR_R::new((self.bits & 0xffff) as u16)
30 }
31 #[doc = "Bit 16 - SAR ADC1 conversion done indication"]
32 #[inline(always)]
33 pub fn meas1_done_sar(&self) -> MEAS1_DONE_SAR_R {
34 MEAS1_DONE_SAR_R::new(((self.bits >> 16) & 1) != 0)
35 }
36 #[doc = "Bit 17 - SAR ADC1 controller (in RTC) starts conversion only active when reg_meas1_start_force = 1"]
37 #[inline(always)]
38 pub fn meas1_start_sar(&self) -> MEAS1_START_SAR_R {
39 MEAS1_START_SAR_R::new(((self.bits >> 17) & 1) != 0)
40 }
41 #[doc = "Bit 18 - 1: SAR ADC1 controller (in RTC) is started by SW 0: SAR ADC1 controller is started by ULP-coprocessor"]
42 #[inline(always)]
43 pub fn meas1_start_force(&self) -> MEAS1_START_FORCE_R {
44 MEAS1_START_FORCE_R::new(((self.bits >> 18) & 1) != 0)
45 }
46 #[doc = "Bits 19:30 - SAR ADC1 pad enable bitmap only active when reg_sar1_en_pad_force = 1"]
47 #[inline(always)]
48 pub fn sar1_en_pad(&self) -> SAR1_EN_PAD_R {
49 SAR1_EN_PAD_R::new(((self.bits >> 19) & 0x0fff) as u16)
50 }
51 #[doc = "Bit 31 - 1: SAR ADC1 pad enable bitmap is controlled by SW 0: SAR ADC1 pad enable bitmap is controlled by ULP-coprocessor"]
52 #[inline(always)]
53 pub fn sar1_en_pad_force(&self) -> SAR1_EN_PAD_FORCE_R {
54 SAR1_EN_PAD_FORCE_R::new(((self.bits >> 31) & 1) != 0)
55 }
56}
57#[cfg(feature = "impl-register-debug")]
58impl core::fmt::Debug for R {
59 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
60 f.debug_struct("SAR_MEAS_START1")
61 .field("meas1_data_sar", &self.meas1_data_sar())
62 .field("meas1_done_sar", &self.meas1_done_sar())
63 .field("meas1_start_sar", &self.meas1_start_sar())
64 .field("meas1_start_force", &self.meas1_start_force())
65 .field("sar1_en_pad", &self.sar1_en_pad())
66 .field("sar1_en_pad_force", &self.sar1_en_pad_force())
67 .finish()
68 }
69}
70impl W {
71 #[doc = "Bit 17 - SAR ADC1 controller (in RTC) starts conversion only active when reg_meas1_start_force = 1"]
72 #[inline(always)]
73 pub fn meas1_start_sar(&mut self) -> MEAS1_START_SAR_W<SAR_MEAS_START1_SPEC> {
74 MEAS1_START_SAR_W::new(self, 17)
75 }
76 #[doc = "Bit 18 - 1: SAR ADC1 controller (in RTC) is started by SW 0: SAR ADC1 controller is started by ULP-coprocessor"]
77 #[inline(always)]
78 pub fn meas1_start_force(&mut self) -> MEAS1_START_FORCE_W<SAR_MEAS_START1_SPEC> {
79 MEAS1_START_FORCE_W::new(self, 18)
80 }
81 #[doc = "Bits 19:30 - SAR ADC1 pad enable bitmap only active when reg_sar1_en_pad_force = 1"]
82 #[inline(always)]
83 pub fn sar1_en_pad(&mut self) -> SAR1_EN_PAD_W<SAR_MEAS_START1_SPEC> {
84 SAR1_EN_PAD_W::new(self, 19)
85 }
86 #[doc = "Bit 31 - 1: SAR ADC1 pad enable bitmap is controlled by SW 0: SAR ADC1 pad enable bitmap is controlled by ULP-coprocessor"]
87 #[inline(always)]
88 pub fn sar1_en_pad_force(&mut self) -> SAR1_EN_PAD_FORCE_W<SAR_MEAS_START1_SPEC> {
89 SAR1_EN_PAD_FORCE_W::new(self, 31)
90 }
91}
92#[doc = "\n\nYou can [`read`](crate::Reg::read) this register and get [`sar_meas_start1::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sar_meas_start1::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
93pub struct SAR_MEAS_START1_SPEC;
94impl crate::RegisterSpec for SAR_MEAS_START1_SPEC {
95 type Ux = u32;
96}
97#[doc = "`read()` method returns [`sar_meas_start1::R`](R) reader structure"]
98impl crate::Readable for SAR_MEAS_START1_SPEC {}
99#[doc = "`write(|w| ..)` method takes [`sar_meas_start1::W`](W) writer structure"]
100impl crate::Writable for SAR_MEAS_START1_SPEC {
101 type Safety = crate::Unsafe;
102 const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
103 const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
104}
105#[doc = "`reset()` method sets SAR_MEAS_START1 to value 0"]
106impl crate::Resettable for SAR_MEAS_START1_SPEC {
107 const RESET_VALUE: u32 = 0;
108}