esp32/mcpwm0/ch/
gen_cfg0.rs

1#[doc = "Register `GEN_CFG0` reader"]
2pub type R = crate::R<GEN_CFG0_SPEC>;
3#[doc = "Register `GEN_CFG0` writer"]
4pub type W = crate::W<GEN_CFG0_SPEC>;
5#[doc = "Field `CFG_UPMETHOD` reader - "]
6pub type CFG_UPMETHOD_R = crate::FieldReader;
7#[doc = "Field `CFG_UPMETHOD` writer - "]
8pub type CFG_UPMETHOD_W<'a, REG> = crate::FieldWriter<'a, REG, 4>;
9#[doc = "Field `T0_SEL` reader - "]
10pub type T0_SEL_R = crate::FieldReader;
11#[doc = "Field `T0_SEL` writer - "]
12pub type T0_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 3>;
13#[doc = "Field `T1_SEL` reader - "]
14pub type T1_SEL_R = crate::FieldReader;
15#[doc = "Field `T1_SEL` writer - "]
16pub type T1_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 3>;
17impl R {
18    #[doc = "Bits 0:3"]
19    #[inline(always)]
20    pub fn cfg_upmethod(&self) -> CFG_UPMETHOD_R {
21        CFG_UPMETHOD_R::new((self.bits & 0x0f) as u8)
22    }
23    #[doc = "Bits 4:6"]
24    #[inline(always)]
25    pub fn t0_sel(&self) -> T0_SEL_R {
26        T0_SEL_R::new(((self.bits >> 4) & 7) as u8)
27    }
28    #[doc = "Bits 7:9"]
29    #[inline(always)]
30    pub fn t1_sel(&self) -> T1_SEL_R {
31        T1_SEL_R::new(((self.bits >> 7) & 7) as u8)
32    }
33}
34#[cfg(feature = "impl-register-debug")]
35impl core::fmt::Debug for R {
36    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
37        f.debug_struct("GEN_CFG0")
38            .field("cfg_upmethod", &self.cfg_upmethod())
39            .field("t0_sel", &self.t0_sel())
40            .field("t1_sel", &self.t1_sel())
41            .finish()
42    }
43}
44impl W {
45    #[doc = "Bits 0:3"]
46    #[inline(always)]
47    pub fn cfg_upmethod(&mut self) -> CFG_UPMETHOD_W<GEN_CFG0_SPEC> {
48        CFG_UPMETHOD_W::new(self, 0)
49    }
50    #[doc = "Bits 4:6"]
51    #[inline(always)]
52    pub fn t0_sel(&mut self) -> T0_SEL_W<GEN_CFG0_SPEC> {
53        T0_SEL_W::new(self, 4)
54    }
55    #[doc = "Bits 7:9"]
56    #[inline(always)]
57    pub fn t1_sel(&mut self) -> T1_SEL_W<GEN_CFG0_SPEC> {
58        T1_SEL_W::new(self, 7)
59    }
60}
61#[doc = "\n\nYou can [`read`](crate::Reg::read) this register and get [`gen_cfg0::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`gen_cfg0::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
62pub struct GEN_CFG0_SPEC;
63impl crate::RegisterSpec for GEN_CFG0_SPEC {
64    type Ux = u32;
65}
66#[doc = "`read()` method returns [`gen_cfg0::R`](R) reader structure"]
67impl crate::Readable for GEN_CFG0_SPEC {}
68#[doc = "`write(|w| ..)` method takes [`gen_cfg0::W`](W) writer structure"]
69impl crate::Writable for GEN_CFG0_SPEC {
70    type Safety = crate::Unsafe;
71    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
72    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
73}
74#[doc = "`reset()` method sets GEN_CFG0 to value 0"]
75impl crate::Resettable for GEN_CFG0_SPEC {
76    const RESET_VALUE: u32 = 0;
77}
esp32/mcpwm0/ch/gen_cfg0.rs

esp32/mcpwm0/ch/
gen_cfg0.rs
