esp32/emac_mac/
emacintmask.rs

1#[doc = "Register `EMACINTMASK` reader"]
2pub type R = crate::R<EMACINTMASK_SPEC>;
3#[doc = "Register `EMACINTMASK` writer"]
4pub type W = crate::W<EMACINTMASK_SPEC>;
5#[doc = "Field `PMTINTMASK` reader - When set this bit disables the assertion of the interrupt signal because of the setting of PMT Interrupt Status bit in Register (Interrupt Status Register)."]
6pub type PMTINTMASK_R = crate::BitReader;
7#[doc = "Field `PMTINTMASK` writer - When set this bit disables the assertion of the interrupt signal because of the setting of PMT Interrupt Status bit in Register (Interrupt Status Register)."]
8pub type PMTINTMASK_W<'a, REG> = crate::BitWriter<'a, REG>;
9#[doc = "Field `LPIINTMASK` reader - When set this bit disables the assertion of the interrupt signal because of the setting of the LPI Interrupt Status bit in Register (Interrupt Status Register)."]
10pub type LPIINTMASK_R = crate::BitReader;
11#[doc = "Field `LPIINTMASK` writer - When set this bit disables the assertion of the interrupt signal because of the setting of the LPI Interrupt Status bit in Register (Interrupt Status Register)."]
12pub type LPIINTMASK_W<'a, REG> = crate::BitWriter<'a, REG>;
13impl R {
14    #[doc = "Bit 3 - When set this bit disables the assertion of the interrupt signal because of the setting of PMT Interrupt Status bit in Register (Interrupt Status Register)."]
15    #[inline(always)]
16    pub fn pmtintmask(&self) -> PMTINTMASK_R {
17        PMTINTMASK_R::new(((self.bits >> 3) & 1) != 0)
18    }
19    #[doc = "Bit 10 - When set this bit disables the assertion of the interrupt signal because of the setting of the LPI Interrupt Status bit in Register (Interrupt Status Register)."]
20    #[inline(always)]
21    pub fn lpiintmask(&self) -> LPIINTMASK_R {
22        LPIINTMASK_R::new(((self.bits >> 10) & 1) != 0)
23    }
24}
25#[cfg(feature = "impl-register-debug")]
26impl core::fmt::Debug for R {
27    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
28        f.debug_struct("EMACINTMASK")
29            .field("pmtintmask", &self.pmtintmask())
30            .field("lpiintmask", &self.lpiintmask())
31            .finish()
32    }
33}
34impl W {
35    #[doc = "Bit 3 - When set this bit disables the assertion of the interrupt signal because of the setting of PMT Interrupt Status bit in Register (Interrupt Status Register)."]
36    #[inline(always)]
37    pub fn pmtintmask(&mut self) -> PMTINTMASK_W<EMACINTMASK_SPEC> {
38        PMTINTMASK_W::new(self, 3)
39    }
40    #[doc = "Bit 10 - When set this bit disables the assertion of the interrupt signal because of the setting of the LPI Interrupt Status bit in Register (Interrupt Status Register)."]
41    #[inline(always)]
42    pub fn lpiintmask(&mut self) -> LPIINTMASK_W<EMACINTMASK_SPEC> {
43        LPIINTMASK_W::new(self, 10)
44    }
45}
46#[doc = "Interrupt mask\n\nYou can [`read`](crate::Reg::read) this register and get [`emacintmask::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`emacintmask::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
47pub struct EMACINTMASK_SPEC;
48impl crate::RegisterSpec for EMACINTMASK_SPEC {
49    type Ux = u32;
50}
51#[doc = "`read()` method returns [`emacintmask::R`](R) reader structure"]
52impl crate::Readable for EMACINTMASK_SPEC {}
53#[doc = "`write(|w| ..)` method takes [`emacintmask::W`](W) writer structure"]
54impl crate::Writable for EMACINTMASK_SPEC {
55    type Safety = crate::Unsafe;
56    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
57    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
58}
59#[doc = "`reset()` method sets EMACINTMASK to value 0"]
60impl crate::Resettable for EMACINTMASK_SPEC {
61    const RESET_VALUE: u32 = 0;
62}
esp32/emac_mac/emacintmask.rs

esp32/emac_mac/
emacintmask.rs
