Module esp32::pcnt::int_clr

Structs

CNT_THR_EVENT_U0_INT_CLR_W

Field CNT_THR_EVENT_U0_INT_CLR writer - Set this bit to clear channel0 event interrupt.

CNT_THR_EVENT_U1_INT_CLR_W

Field CNT_THR_EVENT_U1_INT_CLR writer - Set this bit to clear channel1 event interrupt.

CNT_THR_EVENT_U2_INT_CLR_W

Field CNT_THR_EVENT_U2_INT_CLR writer - Set this bit to clear channel2 event interrupt.

CNT_THR_EVENT_U3_INT_CLR_W

Field CNT_THR_EVENT_U3_INT_CLR writer - Set this bit to clear channel3 event interrupt.

CNT_THR_EVENT_U4_INT_CLR_W

Field CNT_THR_EVENT_U4_INT_CLR writer - Set this bit to clear channel4 event interrupt.

CNT_THR_EVENT_U5_INT_CLR_W

Field CNT_THR_EVENT_U5_INT_CLR writer - Set this bit to clear channel5 event interrupt.

CNT_THR_EVENT_U6_INT_CLR_W

Field CNT_THR_EVENT_U6_INT_CLR writer - Set this bit to clear channel6 event interrupt.

CNT_THR_EVENT_U7_INT_CLR_W

Field CNT_THR_EVENT_U7_INT_CLR writer - Set this bit to clear channel7 event interrupt.

INT_CLR_SPEC

This register you can [write_with_zero] (crate::generic::Reg::write_with_zero), [reset] (crate::generic::Reg::reset), write (crate::generic::Reg::write). See [API] (https://docs.rs/svd2rust/#read–modify–write-api).

W

Register INT_CLR writer