Module esp32::apb_ctrl::apb_saradc_ctrl
source · [−]Expand description
Structs
This register you can [read
]
(crate::generic::Reg::read), [write_with_zero
]
(crate::generic::Reg::write_with_zero), [reset
]
(crate::generic::Reg::reset), write
(crate::generic::Reg::write), [modify
]
(crate::generic::Reg::modify). See [API]
(https://docs.rs/svd2rust/#read–modify–write-api).
Register APB_SARADC_CTRL
reader
Field SARADC_DATA_SAR_SEL
reader - 1: sar_sel will be coded by the MSB of the 16-bit output data in this case the resolution should not be larger than 11 bits.
Field SARADC_DATA_SAR_SEL
writer - 1: sar_sel will be coded by the MSB of the 16-bit output data in this case the resolution should not be larger than 11 bits.
Field SARADC_DATA_TO_I2S
reader - 1: I2S input data is from SAR ADC (for DMA) 0: I2S input data is from GPIO matrix
Field SARADC_DATA_TO_I2S
writer - 1: I2S input data is from SAR ADC (for DMA) 0: I2S input data is from GPIO matrix
Field SARADC_SAR1_PATT_LEN
reader - 0 ~ 15 means length 1 ~ 16
Field SARADC_SAR1_PATT_LEN
writer - 0 ~ 15 means length 1 ~ 16
Field SARADC_SAR1_PATT_P_CLEAR
reader - clear the pointer of pattern table for DIG ADC1 CTRL
Field SARADC_SAR1_PATT_P_CLEAR
writer - clear the pointer of pattern table for DIG ADC1 CTRL
Field SARADC_SAR2_MUX
reader - 1: SAR ADC2 is controlled by DIG ADC2 CTRL 0: SAR ADC2 is controlled by PWDET CTRL
Field SARADC_SAR2_MUX
writer - 1: SAR ADC2 is controlled by DIG ADC2 CTRL 0: SAR ADC2 is controlled by PWDET CTRL
Field SARADC_SAR2_PATT_LEN
reader - 0 ~ 15 means length 1 ~ 16
Field SARADC_SAR2_PATT_LEN
writer - 0 ~ 15 means length 1 ~ 16
Field SARADC_SAR2_PATT_P_CLEAR
reader - clear the pointer of pattern table for DIG ADC2 CTRL
Field SARADC_SAR2_PATT_P_CLEAR
writer - clear the pointer of pattern table for DIG ADC2 CTRL
Field SARADC_SAR_CLK_DIV
reader - SAR clock divider
Field SARADC_SAR_CLK_DIV
writer - SAR clock divider
Field SARADC_SAR_CLK_GATED
reader -
Field SARADC_SAR_CLK_GATED
writer -
Field SARADC_SAR_SEL
reader - 0: SAR1 1: SAR2 only work for single SAR mode
Field SARADC_SAR_SEL
writer - 0: SAR1 1: SAR2 only work for single SAR mode
Field SARADC_START_FORCE
reader -
Field SARADC_START_FORCE
writer -
Field SARADC_START
reader -
Field SARADC_START
writer -
Field SARADC_WORK_MODE
reader - 0: single mode 1: double mode 2: alternate mode
Field SARADC_WORK_MODE
writer - 0: single mode 1: double mode 2: alternate mode
Register APB_SARADC_CTRL
writer