[−][src]Struct esp32::rtccntl::RegisterBlock

#[repr(C)]pub struct RegisterBlock {
    pub options0: Reg<OPTIONS0_SPEC>,
    pub slp_timer0: Reg<SLP_TIMER0_SPEC>,
    pub slp_timer1: Reg<SLP_TIMER1_SPEC>,
    pub time_update: Reg<TIME_UPDATE_SPEC>,
    pub time0: Reg<TIME0_SPEC>,
    pub time1: Reg<TIME1_SPEC>,
    pub state0: Reg<STATE0_SPEC>,
    pub timer1: Reg<TIMER1_SPEC>,
    pub timer2: Reg<TIMER2_SPEC>,
    pub timer3: Reg<TIMER3_SPEC>,
    pub timer4: Reg<TIMER4_SPEC>,
    pub timer5: Reg<TIMER5_SPEC>,
    pub ana_conf: Reg<ANA_CONF_SPEC>,
    pub reset_state: Reg<RESET_STATE_SPEC>,
    pub wakeup_state: Reg<WAKEUP_STATE_SPEC>,
    pub int_ena: Reg<INT_ENA_SPEC>,
    pub int_raw: Reg<INT_RAW_SPEC>,
    pub int_st: Reg<INT_ST_SPEC>,
    pub int_clr: Reg<INT_CLR_SPEC>,
    pub store0: Reg<STORE0_SPEC>,
    pub store1: Reg<STORE1_SPEC>,
    pub store2: Reg<STORE2_SPEC>,
    pub store3: Reg<STORE3_SPEC>,
    pub ext_xtl_conf: Reg<EXT_XTL_CONF_SPEC>,
    pub ext_wakeup_conf: Reg<EXT_WAKEUP_CONF_SPEC>,
    pub slp_reject_conf: Reg<SLP_REJECT_CONF_SPEC>,
    pub cpu_period_conf: Reg<CPU_PERIOD_CONF_SPEC>,
    pub sdio_act_conf: Reg<SDIO_ACT_CONF_SPEC>,
    pub clk_conf: Reg<CLK_CONF_SPEC>,
    pub sdio_conf: Reg<SDIO_CONF_SPEC>,
    pub bias_conf: Reg<BIAS_CONF_SPEC>,
    pub cntl: Reg<CNTL_SPEC>,
    pub pwc: Reg<PWC_SPEC>,
    pub dig_pwc: Reg<DIG_PWC_SPEC>,
    pub dig_iso: Reg<DIG_ISO_SPEC>,
    pub wdtconfig0: Reg<WDTCONFIG0_SPEC>,
    pub wdtconfig1: Reg<WDTCONFIG1_SPEC>,
    pub wdtconfig2: Reg<WDTCONFIG2_SPEC>,
    pub wdtconfig3: Reg<WDTCONFIG3_SPEC>,
    pub wdtconfig4: Reg<WDTCONFIG4_SPEC>,
    pub wdtfeed: Reg<WDTFEED_SPEC>,
    pub wdtwprotect: Reg<WDTWPROTECT_SPEC>,
    pub test_mux: Reg<TEST_MUX_SPEC>,
    pub sw_cpu_stall: Reg<SW_CPU_STALL_SPEC>,
    pub store4: Reg<STORE4_SPEC>,
    pub store5: Reg<STORE5_SPEC>,
    pub store6: Reg<STORE6_SPEC>,
    pub store7: Reg<STORE7_SPEC>,
    pub diag1: Reg<DIAG1_SPEC>,
    pub hold_force: Reg<HOLD_FORCE_SPEC>,
    pub ext_wakeup1: Reg<EXT_WAKEUP1_SPEC>,
    pub ext_wakeup1_status: Reg<EXT_WAKEUP1_STATUS_SPEC>,
    pub brown_out: Reg<BROWN_OUT_SPEC>,
    pub date: Reg<DATE_SPEC>,
    pub apll: Reg<APLL_SPEC>,
    pub pll: Reg<PLL_SPEC>,
    // some fields omitted
}

Register block

Fields

options0: Reg<OPTIONS0_SPEC>

0x00 - RTC_CNTL_OPTIONS0

slp_timer0: Reg<SLP_TIMER0_SPEC>

0x04 - RTC_CNTL_SLP_TIMER0

slp_timer1: Reg<SLP_TIMER1_SPEC>

0x08 - RTC_CNTL_SLP_TIMER1

time_update: Reg<TIME_UPDATE_SPEC>

0x0c - RTC_CNTL_TIME_UPDATE

time0: Reg<TIME0_SPEC>

0x10 - RTC_CNTL_TIME0

time1: Reg<TIME1_SPEC>

0x14 - RTC_CNTL_TIME1

state0: Reg<STATE0_SPEC>

0x18 - RTC_CNTL_STATE0

timer1: Reg<TIMER1_SPEC>

0x1c - RTC_CNTL_TIMER1

timer2: Reg<TIMER2_SPEC>

0x20 - RTC_CNTL_TIMER2

timer3: Reg<TIMER3_SPEC>

0x24 - RTC_CNTL_TIMER3

timer4: Reg<TIMER4_SPEC>

0x28 - RTC_CNTL_TIMER4

timer5: Reg<TIMER5_SPEC>

0x2c - RTC_CNTL_TIMER5

ana_conf: Reg<ANA_CONF_SPEC>

0x30 - RTC_CNTL_ANA_CONF

reset_state: Reg<RESET_STATE_SPEC>

0x34 - RTC_CNTL_RESET_STATE

wakeup_state: Reg<WAKEUP_STATE_SPEC>

0x38 - RTC_CNTL_WAKEUP_STATE

int_ena: Reg<INT_ENA_SPEC>

0x3c - RTC_CNTL_INT_ENA

int_raw: Reg<INT_RAW_SPEC>

0x40 - RTC_CNTL_INT_RAW

int_st: Reg<INT_ST_SPEC>

0x44 - RTC_CNTL_INT_ST

int_clr: Reg<INT_CLR_SPEC>

0x48 - RTC_CNTL_INT_CLR

store0: Reg<STORE0_SPEC>

0x4c - RTC_CNTL_STORE0

store1: Reg<STORE1_SPEC>

0x50 - RTC_CNTL_STORE1

store2: Reg<STORE2_SPEC>

0x54 - RTC_CNTL_STORE2

store3: Reg<STORE3_SPEC>

0x58 - RTC_CNTL_STORE3

ext_xtl_conf: Reg<EXT_XTL_CONF_SPEC>

0x5c - RTC_CNTL_EXT_XTL_CONF

ext_wakeup_conf: Reg<EXT_WAKEUP_CONF_SPEC>

0x60 - RTC_CNTL_EXT_WAKEUP_CONF

slp_reject_conf: Reg<SLP_REJECT_CONF_SPEC>

0x64 - RTC_CNTL_SLP_REJECT_CONF

cpu_period_conf: Reg<CPU_PERIOD_CONF_SPEC>

0x68 - RTC_CNTL_CPU_PERIOD_CONF

sdio_act_conf: Reg<SDIO_ACT_CONF_SPEC>

0x6c - RTC_CNTL_SDIO_ACT_CONF

clk_conf: Reg<CLK_CONF_SPEC>

0x70 - RTC_CNTL_CLK_CONF

sdio_conf: Reg<SDIO_CONF_SPEC>

0x74 - RTC_CNTL_SDIO_CONF

bias_conf: Reg<BIAS_CONF_SPEC>

0x78 - RTC_CNTL_BIAS_CONF

cntl: Reg<CNTL_SPEC>

0x7c - RTC Control Register

pwc: Reg<PWC_SPEC>

0x80 - RTC_CNTL_PWC

dig_pwc: Reg<DIG_PWC_SPEC>

0x84 - RTC_CNTL_DIG_PWC

dig_iso: Reg<DIG_ISO_SPEC>

0x88 - RTC_CNTL_DIG_ISO

wdtconfig0: Reg<WDTCONFIG0_SPEC>

0x8c - RTC_CNTL_WDTCONFIG0

wdtconfig1: Reg<WDTCONFIG1_SPEC>

0x90 - RTC_CNTL_WDTCONFIG1

wdtconfig2: Reg<WDTCONFIG2_SPEC>

0x94 - RTC_CNTL_WDTCONFIG2

wdtconfig3: Reg<WDTCONFIG3_SPEC>

0x98 - RTC_CNTL_WDTCONFIG3

wdtconfig4: Reg<WDTCONFIG4_SPEC>

0x9c - RTC_CNTL_WDTCONFIG4

wdtfeed: Reg<WDTFEED_SPEC>

0xa0 - RTC_CNTL_WDTFEED

wdtwprotect: Reg<WDTWPROTECT_SPEC>

0xa4 - RTC_CNTL_WDTWPROTECT

test_mux: Reg<TEST_MUX_SPEC>

0xa8 - RTC_CNTL_TEST_MUX

sw_cpu_stall: Reg<SW_CPU_STALL_SPEC>

0xac - RTC_CNTL_SW_CPU_STALL

store4: Reg<STORE4_SPEC>

0xb0 - RTC_CNTL_STORE4

store5: Reg<STORE5_SPEC>

0xb4 - RTC_CNTL_STORE5

store6: Reg<STORE6_SPEC>

0xb8 - RTC_CNTL_STORE6

store7: Reg<STORE7_SPEC>

0xbc - RTC_CNTL_STORE7

diag1: Reg<DIAG1_SPEC>

0xc4 - RTC_CNTL_DIAG1

hold_force: Reg<HOLD_FORCE_SPEC>

0xc8 - RTC_CNTL_HOLD_FORCE

ext_wakeup1: Reg<EXT_WAKEUP1_SPEC>

0xcc - RTC_CNTL_EXT_WAKEUP1

ext_wakeup1_status: Reg<EXT_WAKEUP1_STATUS_SPEC>

0xd0 - RTC_CNTL_EXT_WAKEUP1_STATUS

brown_out: Reg<BROWN_OUT_SPEC>

0xd4 - RTC_CNTL_BROWN_OUT

date: Reg<DATE_SPEC>

0x13c - RTC_CNTL_DATE

apll: Reg<APLL_SPEC>

0x200c600c - APLL I2C Register

pll: Reg<PLL_SPEC>

0x200c6010 - PLL I2C Register

Auto Trait Implementations

Blanket Implementations

impl<T> Any for T where
    T: 'static + ?Sized, [src]

impl<T> Borrow<T> for T where
    T: ?Sized, [src]

impl<T> BorrowMut<T> for T where
    T: ?Sized, [src]

impl<T> From<T> for T[src]

impl<T, U> Into<U> for T where
    U: From<T>, [src]

impl<T, U> TryFrom<U> for T where
    U: Into<T>, [src]

type Error = Infallible

The type returned in the event of a conversion error.

impl<T, U> TryInto<U> for T where
    U: TryFrom<T>, [src]

type Error = <U as TryFrom<T>>::Error

The type returned in the event of a conversion error.