Type Definition esp32::uhci::uhci_int_raw_reg::W

type W = W<u32, UHCI_INT_RAW_REG>;

Writer for register UHCI_INT_RAW_REG

Methods

impl W

pub fn uhci_dma_infifo_full_wm_int_raw(
    &mut self
) -> UHCI_DMA_INFIFO_FULL_WM_INT_RAW_W

Bit 16

pub fn uhci_send_a_q_int_raw(&mut self) -> UHCI_SEND_A_Q_INT_RAW_W

Bit 15 - When use always_send registers to send a series of short packets it will produce this interrupt when dma has send the short packet.

pub fn uhci_send_s_q_int_raw(&mut self) -> UHCI_SEND_S_Q_INT_RAW_W

Bit 14 - When use single send registers to send a short packets it will produce this interrupt when dma has send the short packet.

pub fn uhci_out_total_eof_int_raw(&mut self) -> UHCI_OUT_TOTAL_EOF_INT_RAW_W

Bit 13 - When all data have been send it will produce uhci_out_total_eof_int interrupt.

pub fn uhci_outlink_eof_err_int_raw(&mut self) -> UHCI_OUTLINK_EOF_ERR_INT_RAW_W

Bit 12 - when there are some errors about eof in outlink descriptor it will produce uhci_outlink_eof_err_int interrupt.

pub fn uhci_in_dscr_empty_int_raw(&mut self) -> UHCI_IN_DSCR_EMPTY_INT_RAW_W

Bit 11 - when there are not enough in links for DMA it will produce uhci_in_dscr_err_int interrupt.

pub fn uhci_out_dscr_err_int_raw(&mut self) -> UHCI_OUT_DSCR_ERR_INT_RAW_W

Bit 10 - when there are some errors about the in link descriptor it will produce uhci_out_dscr_err_int interrupt.

pub fn uhci_in_dscr_err_int_raw(&mut self) -> UHCI_IN_DSCR_ERR_INT_RAW_W

Bit 9 - when there are some errors about the out link descriptor it will produce uhci_in_dscr_err_int interrupt.

pub fn uhci_out_eof_int_raw(&mut self) -> UHCI_OUT_EOF_INT_RAW_W

Bit 8 - when the current descriptor's eof bit is 1 it will produce uhci_out_eof_int interrupt.

pub fn uhci_out_done_int_raw(&mut self) -> UHCI_OUT_DONE_INT_RAW_W

Bit 7 - when a out link descriptor is completed it will produce uhci_out_done_int interrupt.

pub fn uhci_in_err_eof_int_raw(&mut self) -> UHCI_IN_ERR_EOF_INT_RAW_W

Bit 6 - when there are some errors about eof in in link descriptor it will produce uhci_in_err_eof_int interrupt.

pub fn uhci_in_suc_eof_int_raw(&mut self) -> UHCI_IN_SUC_EOF_INT_RAW_W

Bit 5 - when a data packet has been received it will produce uhci_in_suc_eof_int interrupt.

pub fn uhci_in_done_int_raw(&mut self) -> UHCI_IN_DONE_INT_RAW_W

Bit 4 - when a in link descriptor has been completed it will produce uhci_in_done_int interrupt.

pub fn uhci_tx_hung_int_raw(&mut self) -> UHCI_TX_HUNG_INT_RAW_W

Bit 3 - when DMA takes a lot of time to read a data from RAM it will produce uhci_tx_hung_int interrupt.

pub fn uhci_rx_hung_int_raw(&mut self) -> UHCI_RX_HUNG_INT_RAW_W

Bit 2 - when DMA takes a lot of time to receive a data it will produce uhci_rx_hung_int interrupt.

pub fn uhci_tx_start_int_raw(&mut self) -> UHCI_TX_START_INT_RAW_W

Bit 1 - when DMA detects a separator char it will produce uhci_tx_start_int interrupt.

pub fn uhci_rx_start_int_raw(&mut self) -> UHCI_RX_START_INT_RAW_W

Bit 0 - when a separator char has been send it will produce uhci_rx_start_int interrupt.