[][src]Type Definition esp32::uhci::uhci_conf1_reg::R

type R = R<u32, UHCI_CONF1_REG>;

Reader of register UHCI_CONF1_REG

Methods

impl R[src]

pub fn uhci_dma_infifo_full_thrs(&self) -> UHCI_DMA_INFIFO_FULL_THRS_R[src]

Bits 9:20 - when data amount in link descriptor's fifo is more than this register value it will produce uhci_dma_infifo_full_wm_int interrupt.

pub fn uhci_sw_start(&self) -> UHCI_SW_START_R[src]

Bit 8 - Set this bit to start inserting the packet header.

pub fn uhci_wait_sw_start(&self) -> UHCI_WAIT_SW_START_R[src]

Bit 7 - Set this bit to enable software way to add packet header.

pub fn uhci_check_owner(&self) -> UHCI_CHECK_OWNER_R[src]

Bit 6 - Set this bit to check the owner bit in link descriptor.

pub fn uhci_tx_ack_num_re(&self) -> UHCI_TX_ACK_NUM_RE_R[src]

Bit 5 - Set this bit to enable hardware replace ack num in packet header automatically.

pub fn uhci_tx_check_sum_re(&self) -> UHCI_TX_CHECK_SUM_RE_R[src]

Bit 4 - Set this bit to enable hardware replace check_sum in packet header automatically.

pub fn uhci_save_head(&self) -> UHCI_SAVE_HEAD_R[src]

Bit 3 - Set this bit to save packet header .

pub fn uhci_crc_disable(&self) -> UHCI_CRC_DISABLE_R[src]

Bit 2 - Set this bit to disable crc calculation.

pub fn uhci_check_seq_en(&self) -> UHCI_CHECK_SEQ_EN_R[src]

Bit 1 - Set this bit to enable decoder to check seq num in packet header.

pub fn uhci_check_sum_en(&self) -> UHCI_CHECK_SUM_EN_R[src]

Bit 0 - Set this bit to enable decoder to check check_sum in packet header.