Type Definition esp32::uart::uart_int_st_reg::R

type R = R<u32, UART_INT_ST_REG>;

Reader of register UART_INT_ST_REG

Methods

impl R

pub fn uart_at_cmd_char_det_int_st(&self) -> UART_AT_CMD_CHAR_DET_INT_ST_R

Bit 18 - This is the status bit for at_cmd_det_int_raw when at_cmd_char_det_int_ena is set to 1.

pub fn uart_rs485_clash_int_st(&self) -> UART_RS485_CLASH_INT_ST_R

Bit 17 - This is the status bit for rs485_clash_int_raw when rs485_clash_int_ena is set to 1.

pub fn uart_rs485_frm_err_int_st(&self) -> UART_RS485_FRM_ERR_INT_ST_R

Bit 16 - This is the status bit for rs485_fm_err_int_raw when rs485_fm_err_int_ena is set to 1.

pub fn uart_rs485_parity_err_int_st(&self) -> UART_RS485_PARITY_ERR_INT_ST_R

Bit 15 - This is the status bit for rs485_parity_err_int_raw when rs485_parity_int_ena is set to 1.

pub fn uart_tx_done_int_st(&self) -> UART_TX_DONE_INT_ST_R

Bit 14 - This is the status bit for tx_done_int_raw when tx_done_int_ena is set to 1.

pub fn uart_tx_brk_idle_done_int_st(&self) -> UART_TX_BRK_IDLE_DONE_INT_ST_R

Bit 13 - This is the stauts bit for tx_brk_idle_done_int_raw when tx_brk_idle_done_int_ena is set to 1.

pub fn uart_tx_brk_done_int_st(&self) -> UART_TX_BRK_DONE_INT_ST_R

Bit 12 - This is the status bit for tx_brk_done_int_raw when tx_brk_done_int_ena is set to 1.

pub fn uart_glitch_det_int_st(&self) -> UART_GLITCH_DET_INT_ST_R

Bit 11 - This is the status bit for glitch_det_int_raw when glitch_det_int_ena is set to 1.

pub fn uart_sw_xoff_int_st(&self) -> UART_SW_XOFF_INT_ST_R

Bit 10 - This is the status bit for sw_xoff_int_raw when sw_xoff_int_ena is set to 1.

pub fn uart_sw_xon_int_st(&self) -> UART_SW_XON_INT_ST_R

Bit 9 - This is the status bit for sw_xon_int_raw when sw_xon_int_ena is set to 1.

pub fn uart_rxfifo_tout_int_st(&self) -> UART_RXFIFO_TOUT_INT_ST_R

Bit 8 - This is the status bit for rxfifo_tout_int_raw when rxfifo_tout_int_ena is set to 1.

pub fn uart_brk_det_int_st(&self) -> UART_BRK_DET_INT_ST_R

Bit 7 - This is the status bit for brk_det_int_raw when brk_det_int_ena is set to 1.

pub fn uart_cts_chg_int_st(&self) -> UART_CTS_CHG_INT_ST_R

Bit 6 - This is the status bit for cts_chg_int_raw when cts_chg_int_ena is set to 1.

pub fn uart_dsr_chg_int_st(&self) -> UART_DSR_CHG_INT_ST_R

Bit 5 - This is the status bit for dsr_chg_int_raw when dsr_chg_int_ena is set to 1.

pub fn uart_rxfifo_ovf_int_st(&self) -> UART_RXFIFO_OVF_INT_ST_R

Bit 4 - This is the status bit for rxfifo_ovf_int_raw when rxfifo_ovf_int_ena is set to 1.

pub fn uart_frm_err_int_st(&self) -> UART_FRM_ERR_INT_ST_R

Bit 3 - This is the status bit for frm_err_int_raw when fm_err_int_ena is set to 1.

pub fn uart_parity_err_int_st(&self) -> UART_PARITY_ERR_INT_ST_R

Bit 2 - This is the status bit for parity_err_int_raw when parity_err_int_ena is set to 1.

pub fn uart_txfifo_empty_int_st(&self) -> UART_TXFIFO_EMPTY_INT_ST_R

Bit 1 - This is the status bit for txfifo_empty_int_raw when txfifo_empty_int_ena is set to 1.

pub fn uart_rxfifo_full_int_st(&self) -> UART_RXFIFO_FULL_INT_ST_R

Bit 0 - This is the status bit for rxfifo_full_int_raw when rxfifo_full_int_ena is set to 1.