[−][src]Type Definition esp32::timg::timg_wdtconfig5_reg::R
type R = R<u32, TIMG_WDTCONFIG5_REG>;
Reader of register TIMG_WDTCONFIG5_REG
Methods
impl R
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pub fn timg_wdt_stg3_hold(&self) -> TIMG_WDT_STG3_HOLD_R
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Bits 0:31 - Stage 3 timeout value in SWDT clock cycles