[][src]Type Definition esp32::timg::timg_wdtconfig5_reg::R

type R = R<u32, TIMG_WDTCONFIG5_REG>;

Reader of register TIMG_WDTCONFIG5_REG

Methods

impl R[src]

pub fn timg_wdt_stg3_hold(&self) -> TIMG_WDT_STG3_HOLD_R[src]

Bits 0:31 - Stage 3 timeout value in SWDT clock cycles