[−][src]Type Definition esp32::spi::spi_sram_dwr_cmd_reg::W
type W = W<u32, SPI_SRAM_DWR_CMD_REG>;
Writer for register SPI_SRAM_DWR_CMD_REG
Methods
impl W[src]
pub fn spi_cache_sram_usr_wr_cmd_bitlen(
&mut self
) -> SPI_CACHE_SRAM_USR_WR_CMD_BITLEN_W[src]
&mut self
) -> SPI_CACHE_SRAM_USR_WR_CMD_BITLEN_W
Bits 28:31 - For SPI0 When cache mode is enable it is the in bits of command phase for SRAM. The register value shall be (bit_num-1).
pub fn spi_cache_sram_usr_wr_cmd_value(
&mut self
) -> SPI_CACHE_SRAM_USR_WR_CMD_VALUE_W[src]
&mut self
) -> SPI_CACHE_SRAM_USR_WR_CMD_VALUE_W
Bits 0:15 - For SPI0 When cache mode is enable it is the write command value of command phase for SRAM.