[][src]Type Definition esp32::rmt::rmt_ch0conf0_reg::W

type W = W<u32, RMT_CH0CONF0_REG>;

Writer for register RMT_CH0CONF0_REG

Methods

impl W[src]

pub fn rmt_clk_en(&mut self) -> RMT_CLK_EN_W[src]

Bit 31 - This bit is used to control clock.when software config RMT internal registers it controls the register clock.

pub fn rmt_mem_pd(&mut self) -> RMT_MEM_PD_W[src]

Bit 30 - This bit is used to reduce power consumed by mem. 1:mem is in low power state.

pub fn rmt_carrier_out_lv_ch0(&mut self) -> RMT_CARRIER_OUT_LV_CH0_W[src]

Bit 29 - This bit is used to configure the way carrier wave is modulated for channel0.1'b1:transmit on low output level 1'b0:transmit on high output level.

pub fn rmt_carrier_en_ch0(&mut self) -> RMT_CARRIER_EN_CH0_W[src]

Bit 28 - This is the carrier modulation enable control bit for channel0.

pub fn rmt_mem_size_ch0(&mut self) -> RMT_MEM_SIZE_CH0_W[src]

Bits 24:27 - This register is used to configure the the amount of memory blocks allocated to channel0.

pub fn rmt_idle_thres_ch0(&mut self) -> RMT_IDLE_THRES_CH0_W[src]

Bits 8:23 - In receive mode when no edge is detected on the input signal for longer than reg_idle_thres_ch0 then the receive process is done.

pub fn rmt_div_cnt_ch0(&mut self) -> RMT_DIV_CNT_CH0_W[src]

Bits 0:7 - This register is used to configure the frequency divider's factor in channel0.