Type Definition esp32::mcpwm::mcpwm_dt1_cfg_reg::R

type R = R<u32, MCPWM_DT1_CFG_REG>;

Reader of register MCPWM_DT1_CFG_REG

Methods

impl R

pub fn mcpwm_dt1_clk_sel(&self) -> MCPWM_DT1_CLK_SEL_R

Bit 17 - Dead time generator 1 clock selection. 0: PWM_clk 1: PT_clk

pub fn mcpwm_dt1_b_outbypass(&self) -> MCPWM_DT1_B_OUTBYPASS_R

Bit 16 - S0 in documentation

pub fn mcpwm_dt1_a_outbypass(&self) -> MCPWM_DT1_A_OUTBYPASS_R

Bit 15 - S1 in documentation

pub fn mcpwm_dt1_fed_outinvert(&self) -> MCPWM_DT1_FED_OUTINVERT_R

Bit 14 - S3 in documentation

pub fn mcpwm_dt1_red_outinvert(&self) -> MCPWM_DT1_RED_OUTINVERT_R

Bit 13 - S2 in documentation

pub fn mcpwm_dt1_fed_insel(&self) -> MCPWM_DT1_FED_INSEL_R

Bit 12 - S5 in documentation

pub fn mcpwm_dt1_red_insel(&self) -> MCPWM_DT1_RED_INSEL_R

Bit 11 - S4 in documentation

pub fn mcpwm_dt1_b_outswap(&self) -> MCPWM_DT1_B_OUTSWAP_R

Bit 10 - S7 in documentation

pub fn mcpwm_dt1_a_outswap(&self) -> MCPWM_DT1_A_OUTSWAP_R

Bit 9 - S6 in documentation

pub fn mcpwm_dt1_deb_mode(&self) -> MCPWM_DT1_DEB_MODE_R

Bit 8 - S8 in documentation dual-edge B mode 0: FED/RED take effect on different path separately 1: FED/RED take effect on B path A out is in bypass or normal operation mode

pub fn mcpwm_dt1_red_upmethod(&self) -> MCPWM_DT1_RED_UPMETHOD_R

Bits 4:7 - Update method for RED (rising edge delay) active reg. 0: immediate bit0: TEZ bit1: TEP bit2: sync bit3: disable update

pub fn mcpwm_dt1_fed_upmethod(&self) -> MCPWM_DT1_FED_UPMETHOD_R

Bits 0:3 - Update method for FED (falling edge delay) active reg. 0: immediate bit0: TEZ bit1: TEP bit2: sync bit3: disable update