[][src]Type Definition esp32::mcpwm::mcpwm_cap_timer_cfg_reg::R

type R = R<u32, MCPWM_CAP_TIMER_CFG_REG>;

Reader of register MCPWM_CAP_TIMER_CFG_REG

Methods

impl R[src]

pub fn mcpwm_cap_sync_sw(&self) -> MCPWM_CAP_SYNC_SW_R[src]

Bit 5 - Set this bit to force a capture timer sync capture timer is loaded with value in phase register.

pub fn mcpwm_cap_synci_sel(&self) -> MCPWM_CAP_SYNCI_SEL_R[src]

Bits 2:4 - Capture module sync input selection. 0: none 1: timer0 synco 2: timer1 synco 3: timer2 synco 4: SYNC0 from GPIO matrix 5: SYNC1 from GPIO matrix 6: SYNC2 from GPIO matrix

pub fn mcpwm_cap_synci_en(&self) -> MCPWM_CAP_SYNCI_EN_R[src]

Bit 1 - When set capture timer sync is enabled.

pub fn mcpwm_cap_timer_en(&self) -> MCPWM_CAP_TIMER_EN_R[src]

Bit 0 - When set capture timer incrementing under APB_clk is enabled.