Type Definition esp32::i2c::i2c_int_raw_reg::W

type W = W<u32, I2C_INT_RAW_REG>;

Writer for register I2C_INT_RAW_REG

Methods

impl W

pub fn i2c_tx_send_empty_int_raw(&mut self) -> I2C_TX_SEND_EMPTY_INT_RAW_W

Bit 12 - The raw interrupt status bit for tx_send_empty_int interrupt.when I2C sends more data than nonfifo_tx_thres it will produce tx_send_empty_int interrupt..

pub fn i2c_rx_rec_full_int_raw(&mut self) -> I2C_RX_REC_FULL_INT_RAW_W

Bit 11 - The raw interrupt status bit for rx_rec_full_int interrupt. when I2C receives more data than nonfifo_rx_thres it will produce rx_rec_full_int interrupt.

pub fn i2c_ack_err_int_raw(&mut self) -> I2C_ACK_ERR_INT_RAW_W

Bit 10 - The raw interrupt status bit for ack_err_int interrupt. when I2C receives a wrong ACK bit it will produce ack_err_int interrupt..

pub fn i2c_trans_start_int_raw(&mut self) -> I2C_TRANS_START_INT_RAW_W

Bit 9 - The raw interrupt status bit for trans_start_int interrupt. when I2C sends the START bit it will produce trans_start_int interrupt.

pub fn i2c_time_out_int_raw(&mut self) -> I2C_TIME_OUT_INT_RAW_W

Bit 8 - The raw interrupt status bit for time_out_int interrupt. when I2C takes a lot of time to receive a data it will produce time_out_int interrupt.

pub fn i2c_trans_complete_int_raw(&mut self) -> I2C_TRANS_COMPLETE_INT_RAW_W

Bit 7 - The raw interrupt status bit for trans_complete_int interrupt. when I2C Master finished STOP command it will produce trans_complete_int interrupt.

pub fn i2c_master_tran_comp_int_raw(&mut self) -> I2C_MASTER_TRAN_COMP_INT_RAW_W

Bit 6 - The raw interrupt status bit for master_tra_comp_int interrupt. when I2C Master sends or receives a byte it will produce master_tran_comp_int interrupt.

pub fn i2c_arbitration_lost_int_raw(&mut self) -> I2C_ARBITRATION_LOST_INT_RAW_W

Bit 5 - The raw interrupt status bit for arbitration_lost_int interrupt.when I2C lost the usage right of I2C BUS it will produce arbitration_lost_int interrupt.

pub fn i2c_slave_tran_comp_int_raw(&mut self) -> I2C_SLAVE_TRAN_COMP_INT_RAW_W

Bit 4 - The raw interrupt status bit for slave_tran_comp_int interrupt. when I2C Slave detectsthe STOP bit it will produce slave_tran_comp_int interrupt.

pub fn i2c_end_detect_int_raw(&mut self) -> I2C_END_DETECT_INT_RAW_W

Bit 3 - The raw interrupt status bit for end_detect_int interrupt. when I2C deals with the END command it will produce end_detect_int interrupt.

pub fn i2c_rxfifo_ovf_int_raw(&mut self) -> I2C_RXFIFO_OVF_INT_RAW_W

Bit 2 - The raw interrupt status bit for receiving data overflow when use apb fifo access.

pub fn i2c_txfifo_empty_int_raw(&mut self) -> I2C_TXFIFO_EMPTY_INT_RAW_W

Bit 1 - The raw interrupt status bit for txfifo empty when use apb fifo access.

pub fn i2c_rxfifo_full_int_raw(&mut self) -> I2C_RXFIFO_FULL_INT_RAW_W

Bit 0 - The raw interrupt status bit for rxfifo full when use apb fifo access.