[−][src]Type Definition esp32::dport::dport_app_cache_ctrl1_reg::W
type W = W<u32, DPORT_APP_CACHE_CTRL1_REG>;
Writer for register DPORT_APP_CACHE_CTRL1_REG
Methods
impl W
[src]
pub fn dport_app_cache_mmu_ia_clr(&mut self) -> DPORT_APP_CACHE_MMU_IA_CLR_W
[src]
Bit 13
pub fn dport_app_cmmu_pd(&mut self) -> DPORT_APP_CMMU_PD_W
[src]
Bit 12
pub fn dport_app_cmmu_force_on(&mut self) -> DPORT_APP_CMMU_FORCE_ON_W
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Bit 11
pub fn dport_app_cmmu_flash_page_mode(
&mut self
) -> DPORT_APP_CMMU_FLASH_PAGE_MODE_W
[src]
&mut self
) -> DPORT_APP_CMMU_FLASH_PAGE_MODE_W
Bits 9:10
pub fn dport_app_cmmu_sram_page_mode(
&mut self
) -> DPORT_APP_CMMU_SRAM_PAGE_MODE_W
[src]
&mut self
) -> DPORT_APP_CMMU_SRAM_PAGE_MODE_W
Bits 6:8
pub fn dport_app_cache_mask_opsdram(&mut self) -> DPORT_APP_CACHE_MASK_OPSDRAM_W
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Bit 5
pub fn dport_app_cache_mask_drom0(&mut self) -> DPORT_APP_CACHE_MASK_DROM0_W
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Bit 4
pub fn dport_app_cache_mask_dram1(&mut self) -> DPORT_APP_CACHE_MASK_DRAM1_W
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Bit 3
pub fn dport_app_cache_mask_irom0(&mut self) -> DPORT_APP_CACHE_MASK_IROM0_W
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Bit 2
pub fn dport_app_cache_mask_iram1(&mut self) -> DPORT_APP_CACHE_MASK_IRAM1_W
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Bit 1
pub fn dport_app_cache_mask_iram0(&mut self) -> DPORT_APP_CACHE_MASK_IRAM0_W
[src]
Bit 0