Module esp32_hal::pac::sdmmc::clkdiv

Expand description

Clock divider configuration register

Structs

Clock divider configuration register
Register CLKDIV reader
Register CLKDIV writer

Type Definitions

Field CLK_DIVIDER0 reader - Clock divider0 value. Clock divisor is 2n, where n = 0 bypasses the divider (divisor of 1). For example, a value of 1 means divided by 21 = 2, a value of 0xFF means divided by 2*255 = 510, and so on.
Field CLK_DIVIDER0 writer - Clock divider0 value. Clock divisor is 2n, where n = 0 bypasses the divider (divisor of 1). For example, a value of 1 means divided by 21 = 2, a value of 0xFF means divided by 2*255 = 510, and so on.
Field CLK_DIVIDER1 reader - Clock divider1 value. Clock divisor is 2n, where n = 0 bypasses the divider (divisor of 1). For example, a value of 1 means divided by 21 = 2, a value of 0xFF means divided by 2*255 = 510, and so on.
Field CLK_DIVIDER1 writer - Clock divider1 value. Clock divisor is 2n, where n = 0 bypasses the divider (divisor of 1). For example, a value of 1 means divided by 21 = 2, a value of 0xFF means divided by 2*255 = 510, and so on.
Field CLK_DIVIDER2 reader - Clock divider2 value. Clock divisor is 2n, where n = 0 bypasses the divider (divisor of 1). For example, a value of 1 means divided by 21 = 2, a value of 0xFF means divided by 2*255 = 510, and so on.
Field CLK_DIVIDER2 writer - Clock divider2 value. Clock divisor is 2n, where n = 0 bypasses the divider (divisor of 1). For example, a value of 1 means divided by 21 = 2, a value of 0xFF means divided by 2*255 = 510, and so on.
Field CLK_DIVIDER3 reader - Clock divider3 value. Clock divisor is 2n, where n = 0 bypasses the divider (divisor of 1). For example, a value of 1 means divided by 21 = 2, a value of 0xFF means divided by 2*255 = 510, and so on.
Field CLK_DIVIDER3 writer - Clock divider3 value. Clock divisor is 2n, where n = 0 bypasses the divider (divisor of 1). For example, a value of 1 means divided by 21 = 2, a value of 0xFF means divided by 2*255 = 510, and so on.