Expand description

Structs

This register you can read, write_with_zero, reset, write, modify. See API.
Register HSTIMER%s_CONF reader
Register HSTIMER%s_CONF writer

Type Definitions

Field DIV_NUM reader - This register is used to configure parameter for divider in high speed timer0 the least significant eight bits represent the decimal part.
Field DIV_NUM writer - This register is used to configure parameter for divider in high speed timer0 the least significant eight bits represent the decimal part.
Field DUTY_RES reader - This register controls the range of the counter in high speed timer0. the counter range is [0 2**reg_hstimer0_lim] the max bit width for counter is 20.
Field DUTY_RES writer - This register controls the range of the counter in high speed timer0. the counter range is [0 2**reg_hstimer0_lim] the max bit width for counter is 20.
Field LIM reader -
Field LIM writer -
Field PAUSE reader - This bit is used to pause the counter in high speed timer0
Field PAUSE writer - This bit is used to pause the counter in high speed timer0
Field RST reader - This bit is used to reset high speed timer0 the counter will be 0 after reset.
Field RST writer - This bit is used to reset high speed timer0 the counter will be 0 after reset.
Field TICK_SEL reader - This bit is used to choose apb_clk or ref_tick for high speed timer0. 1’b1:apb_clk 0:ref_tick
Field TICK_SEL writer - This bit is used to choose apb_clk or ref_tick for high speed timer0. 1’b1:apb_clk 0:ref_tick