Module esp32_hal::pac::spi0::user

Structs

R

Register USER reader

USER_SPEC

This register you can read, write_with_zero, reset, write, modify. See API.

W

Register USER writer

Type Definitions

CK_I_EDGE_R

Field CK_I_EDGE reader - In the slave mode the bit is same as spi_ck_out_edge in master mode. It is combined with spi_miso_delay_mode bits.

CK_I_EDGE_W

Field CK_I_EDGE writer - In the slave mode the bit is same as spi_ck_out_edge in master mode. It is combined with spi_miso_delay_mode bits.

CK_OUT_EDGE_R

Field CK_OUT_EDGE reader - the bit combined with spi_mosi_delay_mode bits to set mosi signal delay mode.

CK_OUT_EDGE_W

Field CK_OUT_EDGE writer - the bit combined with spi_mosi_delay_mode bits to set mosi signal delay mode.

CS_HOLD_R

Field CS_HOLD reader - spi cs keep low when spi is in ¡°done¡± phase. 1: enable 0: disable.

CS_HOLD_W

Field CS_HOLD writer - spi cs keep low when spi is in ¡°done¡± phase. 1: enable 0: disable.

CS_SETUP_R

Field CS_SETUP reader - spi cs is enable when spi is in ¡°prepare¡± phase. 1: enable 0: disable.

CS_SETUP_W

Field CS_SETUP writer - spi cs is enable when spi is in ¡°prepare¡± phase. 1: enable 0: disable.

DOUTDIN_R

Field DOUTDIN reader - Set the bit to enable full duplex communication. 1: enable 0: disable.

DOUTDIN_W

Field DOUTDIN writer - Set the bit to enable full duplex communication. 1: enable 0: disable.

FWRITE_DIO_R

Field FWRITE_DIO reader - In the write operations address phase and read-data phase apply 2 signals.

FWRITE_DIO_W

Field FWRITE_DIO writer - In the write operations address phase and read-data phase apply 2 signals.

FWRITE_DUAL_R

Field FWRITE_DUAL reader - In the write operations read-data phase apply 2 signals

FWRITE_DUAL_W

Field FWRITE_DUAL writer - In the write operations read-data phase apply 2 signals

FWRITE_QIO_R

Field FWRITE_QIO reader - In the write operations address phase and read-data phase apply 4 signals.

FWRITE_QIO_W

Field FWRITE_QIO writer - In the write operations address phase and read-data phase apply 4 signals.

FWRITE_QUAD_R

Field FWRITE_QUAD reader - In the write operations read-data phase apply 4 signals

FWRITE_QUAD_W

Field FWRITE_QUAD writer - In the write operations read-data phase apply 4 signals

RD_BYTE_ORDER_R

Field RD_BYTE_ORDER reader - In read-data (MISO) phase 1: big-endian 0: little_endian

RD_BYTE_ORDER_W

Field RD_BYTE_ORDER writer - In read-data (MISO) phase 1: big-endian 0: little_endian

SIO_R

Field SIO reader - Set the bit to enable 3-line half duplex communication mosi and miso signals share the same pin. 1: enable 0: disable.

SIO_W

Field SIO writer - Set the bit to enable 3-line half duplex communication mosi and miso signals share the same pin. 1: enable 0: disable.

USR_ADDR_HOLD_R

Field USR_ADDR_HOLD reader - spi is hold at address state the bit combined with spi_usr_hold_pol bit.

USR_ADDR_HOLD_W

Field USR_ADDR_HOLD writer - spi is hold at address state the bit combined with spi_usr_hold_pol bit.

USR_ADDR_R

Field USR_ADDR reader - This bit enable the address phase of an operation.

USR_ADDR_W

Field USR_ADDR writer - This bit enable the address phase of an operation.

USR_CMD_HOLD_R

Field USR_CMD_HOLD reader - spi is hold at command state the bit combined with spi_usr_hold_pol bit.

USR_CMD_HOLD_W

Field USR_CMD_HOLD writer - spi is hold at command state the bit combined with spi_usr_hold_pol bit.

USR_COMMAND_R

Field USR_COMMAND reader - This bit enable the command phase of an operation.

USR_COMMAND_W

Field USR_COMMAND writer - This bit enable the command phase of an operation.

USR_DIN_HOLD_R

Field USR_DIN_HOLD reader - spi is hold at data in state the bit combined with spi_usr_hold_pol bit.

USR_DIN_HOLD_W

Field USR_DIN_HOLD writer - spi is hold at data in state the bit combined with spi_usr_hold_pol bit.

USR_DOUT_HOLD_R

Field USR_DOUT_HOLD reader - spi is hold at data out state the bit combined with spi_usr_hold_pol bit.

USR_DOUT_HOLD_W

Field USR_DOUT_HOLD writer - spi is hold at data out state the bit combined with spi_usr_hold_pol bit.

USR_DUMMY_HOLD_R

Field USR_DUMMY_HOLD reader - spi is hold at dummy state the bit combined with spi_usr_hold_pol bit.

USR_DUMMY_HOLD_W

Field USR_DUMMY_HOLD writer - spi is hold at dummy state the bit combined with spi_usr_hold_pol bit.

USR_DUMMY_IDLE_R

Field USR_DUMMY_IDLE reader - spi clock is disable in dummy phase when the bit is enable.

USR_DUMMY_IDLE_W

Field USR_DUMMY_IDLE writer - spi clock is disable in dummy phase when the bit is enable.

USR_DUMMY_R

Field USR_DUMMY reader - This bit enable the dummy phase of an operation.

USR_DUMMY_W

Field USR_DUMMY writer - This bit enable the dummy phase of an operation.

USR_HOLD_POL_R

Field USR_HOLD_POL reader - It is combined with hold bits to set the polarity of spi hold line 1: spi will be held when spi hold line is high 0: spi will be held when spi hold line is low

USR_HOLD_POL_W

Field USR_HOLD_POL writer - It is combined with hold bits to set the polarity of spi hold line 1: spi will be held when spi hold line is high 0: spi will be held when spi hold line is low

USR_MISO_HIGHPART_R

Field USR_MISO_HIGHPART reader - read-data phase only access to high-part of the buffer spi_w8~spi_w15. 1: enable 0: disable.

USR_MISO_HIGHPART_W

Field USR_MISO_HIGHPART writer - read-data phase only access to high-part of the buffer spi_w8~spi_w15. 1: enable 0: disable.

USR_MISO_R

Field USR_MISO reader - This bit enable the read-data phase of an operation.

USR_MISO_W

Field USR_MISO writer - This bit enable the read-data phase of an operation.

USR_MOSI_HIGHPART_R

Field USR_MOSI_HIGHPART reader - write-data phase only access to high-part of the buffer spi_w8~spi_w15. 1: enable 0: disable.

USR_MOSI_HIGHPART_W

Field USR_MOSI_HIGHPART writer - write-data phase only access to high-part of the buffer spi_w8~spi_w15. 1: enable 0: disable.

USR_MOSI_R

Field USR_MOSI reader - This bit enable the write-data phase of an operation.

USR_MOSI_W

Field USR_MOSI writer - This bit enable the write-data phase of an operation.

USR_PREP_HOLD_R

Field USR_PREP_HOLD reader - spi is hold at prepare state the bit combined with spi_usr_hold_pol bit.

USR_PREP_HOLD_W

Field USR_PREP_HOLD writer - spi is hold at prepare state the bit combined with spi_usr_hold_pol bit.

WR_BYTE_ORDER_R

Field WR_BYTE_ORDER reader - In command address write-data (MOSI) phases 1: big-endian 0: litte_endian

WR_BYTE_ORDER_W

Field WR_BYTE_ORDER writer - In command address write-data (MOSI) phases 1: big-endian 0: litte_endian