Expand description
eMMC DDR register
Structs
Type Definitions
Field
HALFSTARTBIT
reader - Control for start bit detection mechanism duration of start bit.Each bit refers to one slot.Set this bit to 1 for eMMC4.5 and above,set to 0 for SD applications.For eMMC4.5,start bit can be: 1’b0-Full cycle. 1’b1-less than one full cycle.Field
HALFSTARTBIT
writer - Control for start bit detection mechanism duration of start bit.Each bit refers to one slot.Set this bit to 1 for eMMC4.5 and above,set to 0 for SD applications.For eMMC4.5,start bit can be: 1’b0-Full cycle. 1’b1-less than one full cycle.Field
HS400_MODE
reader - Set 1 to enable HS400 mode.Field
HS400_MODE
writer - Set 1 to enable HS400 mode.