Module esp32_hal::spi

SPI peripheral control

Currently only implements full duplex controller mode support.

SPI0 is reserved for accessing flash and sram and therefore not usable for other purposes. SPI1 shares its external pins with SPI0 and therefore has severe restrictions in use.

SPI2 &3 can be used freely.

The CS pin is controlled by hardware on esp32 (contrary to the description of embedded_hal).

The Transfer::transfer, Write::write and WriteIter::write_iter functions lock the APB frequency and therefore the requests are always run at the requested baudrate. The primitive FullDuplex::read and FullDuplex::send do not lock the APB frequency and therefore may run at a different frequency.

TODO

• Quad SPI
• Half Duplex
• DMA
• Multiple CS pins

Modules

config

SPI configuration

Structs

Pins	Pins used by the SPI interface
SPI	SPI abstraction

Enums

Error

SPI Errors

Traits

U8orU16orU32