Crate esp_riscv_rt

Minimal startup/runtime for RISC-V CPUs from Espressif.

Features

This crate provides:

• Before main initialization of the .bss and .data sections controlled by features
• #[entry] to declare the entry point of the program

Feature Flags

• fix-sp — Move the stack to the start of RAM to get zero-cost stack overflow protection (ESP32-C6 and ESP32-H2 only!)
• has-mie-mip — Indicate that the device supports mie and mip instructions.

Memory Initialization Feature Flags

• init-data — Initialize the data section.
• init-rtc-fast-data — Initialize the .rtc_fast.data section.
• init-rtc-fast-text — Initialize the .rtc_fast.text section.
• init-rw-text — Initialize the .rwtext section.
• zero-bss — Zero the .bss section.
• zero-rtc-fast-bss — Zero the .rtc_fast.bss section.

Re-exports

• pub use self::Interrupt as interrupt;
• pub use riscv;

Structs

• TrapFrame
  Registers saved in trap handler

Functions

• start_rust^⚠
  Rust entry point (_start_rust)
• start_trap_rust^⚠
  Trap entry point rust (_start_trap_rust)

Attribute Macros

• entry
  Attribute to declare the entry point of the program
• pre_init
  Attribute to mark which function will be called at the beginning of the reset handler.