esp_hal/soc/esp32c6/
gpio.rs

1//! # GPIO configuration module (ESP32-C6)
2//!
3//! ## Overview
4//!
5//! The `GPIO` module provides functions and configurations for controlling the
6//! `General Purpose Input/Output` pins on the `ESP32-C6` chip. It allows you to
7//! configure pins as inputs or outputs, set their state and read their state.
8//!
9//! Let's get through the functionality and configurations provided by this GPIO
10//! module:
11//!   - `gpio` block:
12//!       * Defines the pin configurations for various GPIO pins. Each line represents a pin and its
13//!         associated options such as input/output mode, analog capability, and corresponding
14//!         functions.
15//!   - `analog` block:
16//!       * Block defines the analog capabilities of various GPIO pins. Each line represents a pin
17//!         and its associated options such as mux selection, function selection, and input enable.
18//!   - `enum InputSignal`:
19//!       * This enumeration defines input signals for the GPIO mux. Each input signal is assigned a
20//!         specific value.
21//!   - `enum OutputSignal`:
22//!       * This enumeration defines output signals for the GPIO mux. Each output signal is assigned
23//!         a specific value.
24//!
25//! This trait provides functions to read the interrupt status and NMI status
26//! registers for both the `PRO CPU` and `APP CPU`. The implementation uses the
27//! `gpio` peripheral to access the appropriate registers.
28
29crate::gpio::lp_io::lp_gpio! {
30    0
31    1
32    2
33    3
34    4
35    5
36    6
37    7
38}
esp_hal/soc/esp32c6/gpio.rs

esp_hal/soc/esp32c6/
gpio.rs
