Module reset 

DMA software reset state machine.

Wraps the DMABUSMODE.SWR bit-poll loop in a small struct that takes a DelayNs implementation. Note that embedded_hal::delay::DelayNs is a blocking delay trait — the poll loop will busy-wait the calling task until the controller self-clears or the timeout expires. Callers from async contexts should either accept that block (the reset finishes in a few microseconds on real hardware) or pass a DelayNs implementation whose delay_us yields to the executor.

For a true async variant — using embedded_hal_async::delay::DelayNs so each poll-step .awaits and yields control back to the executor — enable the async cargo feature and use crate::reset::async_impl::AsyncResetController, defined in the cfg-gated async_impl submodule.

Modules

async_impl

Async-flavoured variant of super::ResetController.

Structs

ResetController

Owns a DelayNs implementation and exposes the soft-reset routine.

Enums

ResetError

Reset failure cause.

Constants

RESET_POLL_INTERVAL_US

Polling interval while waiting for DMABUSMODE.SWR to self-clear.

SOFT_RESET_TIMEOUT_MS

Default soft-reset timeout (matches ESP-IDF / ph-esp32-mac).