List of all items

Structs

• clock::ApllCoefficients
• config::EmacConfig
• config::RmiiPins
• dma::DescriptorRing
• dma::RxDescriptor
• dma::TxDescriptor
• dma::VolatileCell
• dma::engine::DmaEngine
• emac::Emac
• embassy::DriverCounters
• embassy::EmacDriver
• embassy::EmacDriverState
• embassy::EmacRxToken
• embassy::EmacTxToken
• embassy::IrqCounters
• interrupt::InterruptStatus
• mdio::EspMdio
• reset::ResetController
• reset::async_impl::AsyncResetController

Enums

• Duplex
• Speed
• config::ClkGpio
• config::RmiiClockConfig
• config::XtalFreq
• emac::Duplex
• emac::EmacState
• emac::Speed
• error::EmacError
• mdio::MdcClockDivider
• reset::ResetError

Functions

• clock::configure_apll_50mhz
• clock::configure_emac_clk_in
• clock::configure_emac_clk_out
• regs::dma::clear_all_interrupts
• regs::dma::clear_bits
• regs::dma::disable_all_interrupts
• regs::dma::enable_default_interrupts
• regs::dma::flush_tx_fifo
• regs::dma::operation_mode
• regs::dma::read
• regs::dma::rx_poll_demand
• regs::dma::set_bits
• regs::dma::set_bus_mode
• regs::dma::set_operation_mode
• regs::dma::set_rx_desc_list_addr
• regs::dma::set_tx_desc_list_addr
• regs::dma::start_rx
• regs::dma::start_tx
• regs::dma::stop_rx
• regs::dma::stop_tx
• regs::dma::tx_poll_demand
• regs::dma::write
• regs::ext::clear_bits
• regs::ext::enable_clocks
• regs::ext::enable_peripheral_clock
• regs::ext::power_up_ram
• regs::ext::read
• regs::ext::set_bits
• regs::ext::set_rmii_clock_external
• regs::ext::set_rmii_clock_internal
• regs::ext::set_rmii_mode
• regs::ext::write
• regs::gpio::configure_rmii_pins
• regs::gpio::configure_smi_pins
• regs::gpio::is_valid_smi_pin
• regs::mac::clear_bits
• regs::mac::config
• regs::mac::read
• regs::mac::set_bits
• regs::mac::set_config
• regs::mac::set_duplex_full
• regs::mac::set_frame_filter
• regs::mac::set_hash_table
• regs::mac::set_mac_address
• regs::mac::set_speed_100mbps
• regs::mac::write

Type Aliases

• emac::EmacDefault
• emac::EmacSmall
• embassy::EmacDefaultDriver
• embassy::EmacSmallDriver

Constants

• dma::bits::rdes0::ALL_ERRORS
• dma::bits::rdes0::CRC_ERR
• dma::bits::rdes0::DA_FILTER_FAIL
• dma::bits::rdes0::DESC_ERR
• dma::bits::rdes0::DRIBBLE_ERR
• dma::bits::rdes0::ERR_SUMMARY
• dma::bits::rdes0::FIRST_DESC
• dma::bits::rdes0::FRAME_LEN_MASK
• dma::bits::rdes0::FRAME_LEN_SHIFT
• dma::bits::rdes0::FRAME_TYPE
• dma::bits::rdes0::LAST_DESC
• dma::bits::rdes0::LATE_COLLISION
• dma::bits::rdes0::LENGTH_ERR
• dma::bits::rdes0::OVERFLOW_ERR
• dma::bits::rdes0::OWN
• dma::bits::rdes0::RX_ERR
• dma::bits::rdes0::RX_WATCHDOG
• dma::bits::rdes1::BUFFER1_SIZE_MASK
• dma::bits::rdes1::BUFFER1_SIZE_SHIFT
• dma::bits::rdes1::DISABLE_IRQ
• dma::bits::rdes1::RX_END_OF_RING
• dma::bits::rdes1::SECOND_ADDR_CHAINED
• dma::bits::tdes0::ALL_ERRORS
• dma::bits::tdes0::CHECKSUM_INSERT_MASK
• dma::bits::tdes0::CHECKSUM_INSERT_SHIFT
• dma::bits::tdes0::COLLISION_COUNT_MASK
• dma::bits::tdes0::COLLISION_COUNT_SHIFT
• dma::bits::tdes0::ERR_SUMMARY
• dma::bits::tdes0::EXCESSIVE_COLLISION
• dma::bits::tdes0::EXCESSIVE_DEFERRAL
• dma::bits::tdes0::FIRST_SEGMENT
• dma::bits::tdes0::INTERRUPT_ON_COMPLETE
• dma::bits::tdes0::IP_HEADER_ERR
• dma::bits::tdes0::IP_PAYLOAD_ERR
• dma::bits::tdes0::JABBER_TIMEOUT
• dma::bits::tdes0::LAST_SEGMENT
• dma::bits::tdes0::LATE_COLLISION
• dma::bits::tdes0::LOSS_OF_CARRIER
• dma::bits::tdes0::NO_CARRIER
• dma::bits::tdes0::OWN
• dma::bits::tdes0::SECOND_ADDR_CHAINED
• dma::bits::tdes0::TX_END_OF_RING
• dma::bits::tdes0::UNDERFLOW_ERR
• dma::bits::tdes1::BUFFER1_SIZE_MASK
• dma::bits::tdes1::BUFFER1_SIZE_SHIFT
• emac::DEFAULT_BUF
• emac::DEFAULT_RX
• emac::DEFAULT_TX
• emac::SMALL_RX
• emac::SMALL_TX
• mdio::MAX_PHY_ADDR
• mdio::MAX_REG_ADDR
• regs::dma::BASE
• regs::dma::DMABUSMODE
• regs::dma::DMACURRXBUFADDR
• regs::dma::DMACURRXDESC
• regs::dma::DMACURTXBUFADDR
• regs::dma::DMACURTXDESC
• regs::dma::DMAINTENABLE
• regs::dma::DMAMISSEDFR
• regs::dma::DMAOPERATION
• regs::dma::DMARXBASEADDR
• regs::dma::DMARXPOLLDEMAND
• regs::dma::DMARXWATCHDOG
• regs::dma::DMASTATUS
• regs::dma::DMATXBASEADDR
• regs::dma::DMATXPOLLDEMAND
• regs::dma::bus_mode::AAL
• regs::dma::bus_mode::ATDS
• regs::dma::bus_mode::DMA_ARB
• regs::dma::bus_mode::DSL_MASK
• regs::dma::bus_mode::DSL_SHIFT
• regs::dma::bus_mode::FIXED_BURST
• regs::dma::bus_mode::MIXED_BURST
• regs::dma::bus_mode::PBL_MASK
• regs::dma::bus_mode::PBL_SHIFT
• regs::dma::bus_mode::PBL_X8
• regs::dma::bus_mode::RPBL_MASK
• regs::dma::bus_mode::RPBL_SHIFT
• regs::dma::bus_mode::SW_RESET
• regs::dma::bus_mode::TX_PRIORITY
• regs::dma::bus_mode::USP
• regs::dma::int_enable::AIE
• regs::dma::int_enable::DEFAULT
• regs::dma::int_enable::ERE
• regs::dma::int_enable::ETE
• regs::dma::int_enable::FBE
• regs::dma::int_enable::NIE
• regs::dma::int_enable::OVE
• regs::dma::int_enable::RIE
• regs::dma::int_enable::RSE
• regs::dma::int_enable::RUE
• regs::dma::int_enable::RWE
• regs::dma::int_enable::TIE
• regs::dma::int_enable::TJE
• regs::dma::int_enable::TSE
• regs::dma::int_enable::TUE
• regs::dma::int_enable::UNE
• regs::dma::operation::DFF
• regs::dma::operation::DT
• regs::dma::operation::FEF
• regs::dma::operation::FTF
• regs::dma::operation::FUF
• regs::dma::operation::OSF
• regs::dma::operation::RSF
• regs::dma::operation::RTC_MASK
• regs::dma::operation::RTC_SHIFT
• regs::dma::operation::SR
• regs::dma::operation::ST
• regs::dma::operation::TSF
• regs::dma::operation::TTC_MASK
• regs::dma::operation::TTC_SHIFT
• regs::dma::status::AIS
• regs::dma::status::ALL_INTERRUPTS
• regs::dma::status::EB_MASK
• regs::dma::status::EB_SHIFT
• regs::dma::status::ERI
• regs::dma::status::ETI
• regs::dma::status::FBI
• regs::dma::status::NIS
• regs::dma::status::OVF
• regs::dma::status::RI
• regs::dma::status::RPS
• regs::dma::status::RS_MASK
• regs::dma::status::RS_SHIFT
• regs::dma::status::RU
• regs::dma::status::RWT
• regs::dma::status::TI
• regs::dma::status::TJT
• regs::dma::status::TPS
• regs::dma::status::TS_MASK
• regs::dma::status::TS_SHIFT
• regs::dma::status::TU
• regs::dma::status::UNF
• regs::ext::BASE
• regs::ext::DPORT_WIFI_CLK_EMAC_EN
• regs::ext::DPORT_WIFI_CLK_EN_REG
• regs::ext::EX_CLKOUT_CONF
• regs::ext::EX_CLK_CTRL
• regs::ext::EX_OSCCLK_CONF
• regs::ext::EX_PD_SEL
• regs::ext::EX_PHYINF_CONF
• regs::ext::IO_MUX_BASE
• regs::ext::clk_ctrl::CLK_EN
• regs::ext::clk_ctrl::EXT_EN
• regs::ext::clk_ctrl::INT_EN
• regs::ext::clk_ctrl::MII_CLK_RX_EN
• regs::ext::clk_ctrl::MII_CLK_TX_EN
• regs::ext::clk_ctrl::RX_125_CLK_EN
• regs::ext::clkout_conf::DIV_NUM_MASK
• regs::ext::clkout_conf::DLY_NUM_MASK
• regs::ext::clkout_conf::DLY_NUM_SHIFT
• regs::ext::clkout_conf::H_DIV_NUM_MASK
• regs::ext::clkout_conf::H_DIV_NUM_SHIFT
• regs::ext::oscclk_conf::CLK_SEL
• regs::ext::oscclk_conf::DIV_NUM_100M_SHIFT
• regs::ext::oscclk_conf::DIV_NUM_10M_MASK
• regs::ext::oscclk_conf::H_DIV_NUM_100M_SHIFT
• regs::ext::oscclk_conf::H_DIV_NUM_10M_SHIFT
• regs::ext::pd_sel::RAM_PD_EN_MASK
• regs::ext::phyinf_conf::CORE_PHY_ADDR_MASK
• regs::ext::phyinf_conf::CORE_PHY_ADDR_SHIFT
• regs::ext::phyinf_conf::PHY_INTF_MII
• regs::ext::phyinf_conf::PHY_INTF_RMII
• regs::ext::phyinf_conf::PHY_INTF_SEL_MASK
• regs::ext::phyinf_conf::PHY_INTF_SEL_SHIFT
• regs::ext::phyinf_conf::SBD_FLOWCTRL
• regs::gpio::EMAC_MDC_O_IDX
• regs::gpio::EMAC_MDI_I_IDX
• regs::gpio::EMAC_MDO_O_IDX
• regs::gpio::GPIO_BASE
• regs::gpio::GPIO_ENABLE1_W1TC_OFFSET
• regs::gpio::GPIO_ENABLE1_W1TS_OFFSET
• regs::gpio::GPIO_ENABLE_W1TC_OFFSET
• regs::gpio::GPIO_ENABLE_W1TS_OFFSET
• regs::gpio::GPIO_FUNC_IN_SEL_CFG_BASE
• regs::gpio::GPIO_FUNC_IN_SEL_MASK
• regs::gpio::GPIO_FUNC_OUT_SEL_CFG_BASE
• regs::gpio::GPIO_FUNC_OUT_SEL_MASK
• regs::gpio::GPIO_OEN_SEL
• regs::gpio::GPIO_OUT_SEL_DISCONNECT
• regs::gpio::GPIO_OUT_W1TC_OFFSET
• regs::gpio::GPIO_OUT_W1TS_OFFSET
• regs::gpio::GPIO_SIG_IN_SEL
• regs::gpio::IO_MUX_BASE
• regs::gpio::IO_MUX_FUNC_EMAC
• regs::gpio::IO_MUX_FUNC_GPIO
• regs::gpio::IO_MUX_FUN_DRV_MASK
• regs::gpio::IO_MUX_FUN_DRV_SHIFT
• regs::gpio::IO_MUX_FUN_IE
• regs::gpio::IO_MUX_MCU_SEL_MASK
• regs::gpio::IO_MUX_MCU_SEL_SHIFT
• regs::mac::BASE
• regs::mac::GMACADDR0H
• regs::mac::GMACADDR0L
• regs::mac::GMACCONFIG
• regs::mac::GMACDEBUG
• regs::mac::GMACFC
• regs::mac::GMACFF
• regs::mac::GMACHASTH
• regs::mac::GMACHASTL
• regs::mac::GMACINTMASK
• regs::mac::GMACINTS
• regs::mac::GMACMIIADDR
• regs::mac::GMACMIIDATA
• regs::mac::GMACVLAN
• regs::mac::config::AUTO_PAD_CRC_STRIP
• regs::mac::config::CHECKSUM_OFFLOAD
• regs::mac::config::DUPLEX_FULL
• regs::mac::config::FRAME_BURST
• regs::mac::config::IFG_MASK
• regs::mac::config::IFG_SHIFT
• regs::mac::config::JABBER_DISABLE
• regs::mac::config::JUMBO_FRAME
• regs::mac::config::LINK_UP
• regs::mac::config::PORT_SELECT
• regs::mac::config::RETRY_DISABLE
• regs::mac::config::RX_ENABLE
• regs::mac::config::SPEED_100
• regs::mac::config::TX_ENABLE
• regs::mac::config::WATCHDOG_DISABLE
• regs::mac::flow_control::FCB_BPA
• regs::mac::flow_control::PLT_MASK
• regs::mac::flow_control::PLT_SHIFT
• regs::mac::flow_control::PT_MASK
• regs::mac::flow_control::PT_SHIFT
• regs::mac::flow_control::RX_ENABLE
• regs::mac::flow_control::TX_ENABLE
• regs::mac::flow_control::UNICAST_PAUSE
• regs::mac::flow_control::ZERO_QUANTA_DISABLE
• regs::mac::frame_filter::DA_INVERSE
• regs::mac::frame_filter::DISABLE_BROADCAST
• regs::mac::frame_filter::HASH_MULTICAST
• regs::mac::frame_filter::HASH_UNICAST
• regs::mac::frame_filter::PASS_ALL_MULTICAST
• regs::mac::frame_filter::PROMISCUOUS
• regs::mac::frame_filter::RECEIVE_ALL
• regs::mac::miiaddr::CR_MASK
• regs::mac::miiaddr::CR_SHIFT
• regs::mac::miiaddr::GB
• regs::mac::miiaddr::GR_MASK
• regs::mac::miiaddr::GR_SHIFT
• regs::mac::miiaddr::GW
• regs::mac::miiaddr::PA_MASK
• regs::mac::miiaddr::PA_SHIFT
• reset::RESET_POLL_INTERVAL_US
• reset::SOFT_RESET_TIMEOUT_MS