Module driver 

Common infrastructure to created command-line tools for logic synthesis using egg.

Structs

Comparison

A struct to compare two results before and after some optimization.

SynthOutput

The output of a SynthRequest run. It optionally contains an explanation and a Report.

SynthReport

The many stats associated with a synthesis run.

SynthRequest

A request to explore and extract an expression. The request can be configured with various options before dedicating to a particular input and compilation strategy.

Constants

GATE_WHITELIST_STR

The list of gates that must be reachable by the disassembling rewrite rule system.

Traits

Canonical

A trait to represent that a language can be canonicalized.

CircuitLang

An alias to all the traits needed to be implemented in order to use the SynthRequest API.

EquivCheck

A trait to represent that a language has some form of equivalence-checking in the form of a Check

Explanable

A trait to represent that an expression is not best explained by relating its roots. As an example, explanations of LutLang::Bus are not useful.

Extractable

A trait to represent that a language is extractable under the SynthRequest optimization goals. In short, three main cost functions are needed to cover all extraction strategies: one for depth, one for cell count, and one for filtering/disassembly.

Report

A trait to facilitate the generation of text-based reports on output ciruits. For EqMap, this includes things like LUT count and circuit-depth.

Functions

process_expression

Compile a CircuitLang expression using a baseline request req. The output expression is returned as a SynthOutput. Everything else goes to stderr.

process_string_expression

Compile a CircuitLang expression from a line of text using a baseline request req. The output expression is returned as a SynthOutput. Everything else goes to stderr.

simple_reader

A simple function to read from file, stdin, or a string. The cmd takes the most precendence, then files, then stdin.