1#[doc = r"Register block"]
2#[repr(C)]
3pub struct RegisterBlock {
4 #[doc = "0x00 - Configuration register for the simple periodic timer"]
5 pub spt_cfg: crate::Reg<spt_cfg::SPT_CFG_SPEC>,
6 #[doc = "0x04 - Allows blocking the PMU and FFE kickoff signal"]
7 pub sleep_mode: crate::Reg<sleep_mode::SLEEP_MODE_SPEC>,
8 #[doc = "0x08 - 40 msec increment error compensation register"]
9 pub error_cmp_40m: crate::Reg<error_cmp_40m::ERROR_CMP_40M_SPEC>,
10 #[doc = "0x0c - 1 sec Increment Error Compensation 0 Register"]
11 pub error_cmp_1s_0: crate::Reg<error_cmp_1s_0::ERROR_CMP_1S_0_SPEC>,
12 #[doc = "0x10 - 1 sec Incremente Error Compensation 1 Register"]
13 pub error_cmp_1s_1: crate::Reg<error_cmp_1s_1::ERROR_CMP_1S_1_SPEC>,
14 #[doc = "0x14 - 1 sec Incremente Error Compensation 2 Register"]
15 pub error_cmp_1s_2: crate::Reg<error_cmp_1s_2::ERROR_CMP_1S_2_SPEC>,
16 #[doc = "0x18 - 1 sec Incremente Error Compensation 3 Register"]
17 pub error_cmp_1s_3: crate::Reg<error_cmp_1s_3::ERROR_CMP_1S_3_SPEC>,
18 #[doc = "0x1c - 2, 4, 6, 8, 16 sec Increment Error Compensation Register"]
19 pub error_cmp_rtc_0: crate::Reg<error_cmp_rtc_0::ERROR_CMP_RTC_0_SPEC>,
20 #[doc = "0x20 - 32, 64, 128, 256 sec Increment Error Compensation Register"]
21 pub error_cmp_rtc_1: crate::Reg<error_cmp_rtc_1::ERROR_CMP_RTC_1_SPEC>,
22 #[doc = "0x24 - 512, 1024, 2048, 4096 sec Increment Error Compensation Register."]
23 pub error_cmp_rtc_2: crate::Reg<error_cmp_rtc_2::ERROR_CMP_RTC_2_SPEC>,
24 #[doc = "0x28 - 8192, 16384 sec Increment Error Compensation Register"]
25 pub error_cmp_rtc_3: crate::Reg<error_cmp_rtc_3::ERROR_CMP_RTC_3_SPEC>,
26 #[doc = "0x2c - Update the 30-Bit Timer once write. Note: Please programmed SPT_EN (0x000, bit 0) to 0 before write this register to avoid any potential issue"]
27 pub update_tmr_val: crate::Reg<update_tmr_val::UPDATE_TMR_VAL_SPEC>,
28 #[doc = "0x30 - Not documented"]
29 pub spare_bits: crate::Reg<spare_bits::SPARE_BITS_SPEC>,
30 #[doc = "0x34 - Return the Value of 30-bits, in 1mS resoultion. This is the RTC value"]
31 pub timer_value: crate::Reg<timer_value::TIMER_VALUE_SPEC>,
32 _reserved_14_ms_cnt_value: [u8; 0x04],
33}
34impl RegisterBlock {
35 #[doc = "0x38 - Return the Value of the 1mS counter which is generating the 1mS event. It is an downcount counter. Default is 0x40 (65-1). For 32KHz input, the resoultion is ~15uS. For 16KHz input, the resoultion is ~30uS"]
36 #[inline(always)]
37 pub fn ms_cnt_value(&self) -> &crate::Reg<ms_cnt_value::MS_CNT_VALUE_SPEC> {
38 unsafe {
39 &*(((self as *const Self) as *const u8).add(56usize)
40 as *const crate::Reg<ms_cnt_value::MS_CNT_VALUE_SPEC>)
41 }
42 }
43 #[doc = "0x38 - Return the Value of the Event counter generating FFE Time out event It is an upcount counter, in 1mS resoultion."]
44 #[inline(always)]
45 pub fn event_cnt_value(
46 &self,
47 ) -> &crate::Reg<event_cnt_value::EVENT_CNT_VALUE_SPEC> {
48 unsafe {
49 &*(((self as *const Self) as *const u8).add(56usize)
50 as *const crate::Reg<event_cnt_value::EVENT_CNT_VALUE_SPEC>)
51 }
52 }
53}
54#[doc = "SPT_CFG register accessor: an alias for `Reg<SPT_CFG_SPEC>`"]
55pub type SPT_CFG = crate::Reg<spt_cfg::SPT_CFG_SPEC>;
56#[doc = "Configuration register for the simple periodic timer"]
57pub mod spt_cfg;
58#[doc = "SLEEP_MODE register accessor: an alias for `Reg<SLEEP_MODE_SPEC>`"]
59pub type SLEEP_MODE = crate::Reg<sleep_mode::SLEEP_MODE_SPEC>;
60#[doc = "Allows blocking the PMU and FFE kickoff signal"]
61pub mod sleep_mode;
62#[doc = "ERROR_CMP_40M register accessor: an alias for `Reg<ERROR_CMP_40M_SPEC>`"]
63pub type ERROR_CMP_40M = crate::Reg<error_cmp_40m::ERROR_CMP_40M_SPEC>;
64#[doc = "40 msec increment error compensation register"]
65pub mod error_cmp_40m;
66#[doc = "ERROR_CMP_1S_0 register accessor: an alias for `Reg<ERROR_CMP_1S_0_SPEC>`"]
67pub type ERROR_CMP_1S_0 = crate::Reg<error_cmp_1s_0::ERROR_CMP_1S_0_SPEC>;
68#[doc = "1 sec Increment Error Compensation 0 Register"]
69pub mod error_cmp_1s_0;
70#[doc = "ERROR_CMP_1S_1 register accessor: an alias for `Reg<ERROR_CMP_1S_1_SPEC>`"]
71pub type ERROR_CMP_1S_1 = crate::Reg<error_cmp_1s_1::ERROR_CMP_1S_1_SPEC>;
72#[doc = "1 sec Incremente Error Compensation 1 Register"]
73pub mod error_cmp_1s_1;
74#[doc = "ERROR_CMP_1S_2 register accessor: an alias for `Reg<ERROR_CMP_1S_2_SPEC>`"]
75pub type ERROR_CMP_1S_2 = crate::Reg<error_cmp_1s_2::ERROR_CMP_1S_2_SPEC>;
76#[doc = "1 sec Incremente Error Compensation 2 Register"]
77pub mod error_cmp_1s_2;
78#[doc = "ERROR_CMP_1S_3 register accessor: an alias for `Reg<ERROR_CMP_1S_3_SPEC>`"]
79pub type ERROR_CMP_1S_3 = crate::Reg<error_cmp_1s_3::ERROR_CMP_1S_3_SPEC>;
80#[doc = "1 sec Incremente Error Compensation 3 Register"]
81pub mod error_cmp_1s_3;
82#[doc = "ERROR_CMP_RTC_0 register accessor: an alias for `Reg<ERROR_CMP_RTC_0_SPEC>`"]
83pub type ERROR_CMP_RTC_0 = crate::Reg<error_cmp_rtc_0::ERROR_CMP_RTC_0_SPEC>;
84#[doc = "2, 4, 6, 8, 16 sec Increment Error Compensation Register"]
85pub mod error_cmp_rtc_0;
86#[doc = "ERROR_CMP_RTC_1 register accessor: an alias for `Reg<ERROR_CMP_RTC_1_SPEC>`"]
87pub type ERROR_CMP_RTC_1 = crate::Reg<error_cmp_rtc_1::ERROR_CMP_RTC_1_SPEC>;
88#[doc = "32, 64, 128, 256 sec Increment Error Compensation Register"]
89pub mod error_cmp_rtc_1;
90#[doc = "ERROR_CMP_RTC_2 register accessor: an alias for `Reg<ERROR_CMP_RTC_2_SPEC>`"]
91pub type ERROR_CMP_RTC_2 = crate::Reg<error_cmp_rtc_2::ERROR_CMP_RTC_2_SPEC>;
92#[doc = "512, 1024, 2048, 4096 sec Increment Error Compensation Register."]
93pub mod error_cmp_rtc_2;
94#[doc = "ERROR_CMP_RTC_3 register accessor: an alias for `Reg<ERROR_CMP_RTC_3_SPEC>`"]
95pub type ERROR_CMP_RTC_3 = crate::Reg<error_cmp_rtc_3::ERROR_CMP_RTC_3_SPEC>;
96#[doc = "8192, 16384 sec Increment Error Compensation Register"]
97pub mod error_cmp_rtc_3;
98#[doc = "UPDATE_TMR_VAL register accessor: an alias for `Reg<UPDATE_TMR_VAL_SPEC>`"]
99pub type UPDATE_TMR_VAL = crate::Reg<update_tmr_val::UPDATE_TMR_VAL_SPEC>;
100#[doc = "Update the 30-Bit Timer once write. Note: Please programmed SPT_EN (0x000, bit 0) to 0 before write this register to avoid any potential issue"]
101pub mod update_tmr_val;
102#[doc = "SPARE_BITS register accessor: an alias for `Reg<SPARE_BITS_SPEC>`"]
103pub type SPARE_BITS = crate::Reg<spare_bits::SPARE_BITS_SPEC>;
104#[doc = "Not documented"]
105pub mod spare_bits;
106#[doc = "TIMER_VALUE register accessor: an alias for `Reg<TIMER_VALUE_SPEC>`"]
107pub type TIMER_VALUE = crate::Reg<timer_value::TIMER_VALUE_SPEC>;
108#[doc = "Return the Value of 30-bits, in 1mS resoultion. This is the RTC value"]
109pub mod timer_value;
110#[doc = "EVENT_CNT_VALUE register accessor: an alias for `Reg<EVENT_CNT_VALUE_SPEC>`"]
111pub type EVENT_CNT_VALUE = crate::Reg<event_cnt_value::EVENT_CNT_VALUE_SPEC>;
112#[doc = "Return the Value of the Event counter generating FFE Time out event It is an upcount counter, in 1mS resoultion."]
113pub mod event_cnt_value;
114#[doc = "MS_CNT_VALUE register accessor: an alias for `Reg<MS_CNT_VALUE_SPEC>`"]
115pub type MS_CNT_VALUE = crate::Reg<ms_cnt_value::MS_CNT_VALUE_SPEC>;
116#[doc = "Return the Value of the 1mS counter which is generating the 1mS event. It is an downcount counter. Default is 0x40 (65-1). For 32KHz input, the resoultion is ~15uS. For 16KHz input, the resoultion is ~30uS"]
117pub mod ms_cnt_value;