eos_s3/spt/
spt_cfg.rs

1#[doc = "Register `SPT_CFG` reader"]
2pub struct R(crate::R<SPT_CFG_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<SPT_CFG_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<SPT_CFG_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<SPT_CFG_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `SPT_CFG` writer"]
17pub struct W(crate::W<SPT_CFG_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<SPT_CFG_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<SPT_CFG_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<SPT_CFG_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field to enable the timer/counter\n\nValue on reset: 0"]
38#[derive(Clone, Copy, Debug, PartialEq)]
39pub enum SPT_EN_A {
40    #[doc = "0: Except 30 bits Timer, all the counter will be reset to 0."]
41    DISABLE = 0,
42    #[doc = "1: Turn on Counter/Timer"]
43    ENABLE = 1,
44}
45impl From<SPT_EN_A> for bool {
46    #[inline(always)]
47    fn from(variant: SPT_EN_A) -> Self {
48        variant as u8 != 0
49    }
50}
51#[doc = "Field `SPT_EN` reader - Field to enable the timer/counter"]
52pub struct SPT_EN_R(crate::FieldReader<bool, SPT_EN_A>);
53impl SPT_EN_R {
54    #[inline(always)]
55    pub(crate) fn new(bits: bool) -> Self {
56        SPT_EN_R(crate::FieldReader::new(bits))
57    }
58    #[doc = r"Get enumerated values variant"]
59    #[inline(always)]
60    pub fn variant(&self) -> SPT_EN_A {
61        match self.bits {
62            false => SPT_EN_A::DISABLE,
63            true => SPT_EN_A::ENABLE,
64        }
65    }
66    #[doc = "Checks if the value of the field is `DISABLE`"]
67    #[inline(always)]
68    pub fn is_disable(&self) -> bool {
69        **self == SPT_EN_A::DISABLE
70    }
71    #[doc = "Checks if the value of the field is `ENABLE`"]
72    #[inline(always)]
73    pub fn is_enable(&self) -> bool {
74        **self == SPT_EN_A::ENABLE
75    }
76}
77impl core::ops::Deref for SPT_EN_R {
78    type Target = crate::FieldReader<bool, SPT_EN_A>;
79    #[inline(always)]
80    fn deref(&self) -> &Self::Target {
81        &self.0
82    }
83}
84#[doc = "Field `SPT_EN` writer - Field to enable the timer/counter"]
85pub struct SPT_EN_W<'a> {
86    w: &'a mut W,
87}
88impl<'a> SPT_EN_W<'a> {
89    #[doc = r"Writes `variant` to the field"]
90    #[inline(always)]
91    pub fn variant(self, variant: SPT_EN_A) -> &'a mut W {
92        self.bit(variant.into())
93    }
94    #[doc = "Except 30 bits Timer, all the counter will be reset to 0."]
95    #[inline(always)]
96    pub fn disable(self) -> &'a mut W {
97        self.variant(SPT_EN_A::DISABLE)
98    }
99    #[doc = "Turn on Counter/Timer"]
100    #[inline(always)]
101    pub fn enable(self) -> &'a mut W {
102        self.variant(SPT_EN_A::ENABLE)
103    }
104    #[doc = r"Sets the field bit"]
105    #[inline(always)]
106    pub fn set_bit(self) -> &'a mut W {
107        self.bit(true)
108    }
109    #[doc = r"Clears the field bit"]
110    #[inline(always)]
111    pub fn clear_bit(self) -> &'a mut W {
112        self.bit(false)
113    }
114    #[doc = r"Writes raw bits to the field"]
115    #[inline(always)]
116    pub fn bit(self, value: bool) -> &'a mut W {
117        self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01);
118        self.w
119    }
120}
121#[doc = "Select the clock source\n\nValue on reset: 0"]
122#[derive(Clone, Copy, Debug, PartialEq)]
123pub enum CLK_SRC_SEL_A {
124    #[doc = "0: Clock source is 32KHz"]
125    CLOCK_32KHZ = 0,
126    #[doc = "1: Clock source is 16KHz"]
127    CLOCK_16KHZ = 1,
128}
129impl From<CLK_SRC_SEL_A> for bool {
130    #[inline(always)]
131    fn from(variant: CLK_SRC_SEL_A) -> Self {
132        variant as u8 != 0
133    }
134}
135#[doc = "Field `CLK_SRC_SEL` reader - Select the clock source"]
136pub struct CLK_SRC_SEL_R(crate::FieldReader<bool, CLK_SRC_SEL_A>);
137impl CLK_SRC_SEL_R {
138    #[inline(always)]
139    pub(crate) fn new(bits: bool) -> Self {
140        CLK_SRC_SEL_R(crate::FieldReader::new(bits))
141    }
142    #[doc = r"Get enumerated values variant"]
143    #[inline(always)]
144    pub fn variant(&self) -> CLK_SRC_SEL_A {
145        match self.bits {
146            false => CLK_SRC_SEL_A::CLOCK_32KHZ,
147            true => CLK_SRC_SEL_A::CLOCK_16KHZ,
148        }
149    }
150    #[doc = "Checks if the value of the field is `CLOCK_32KHZ`"]
151    #[inline(always)]
152    pub fn is_clock_32khz(&self) -> bool {
153        **self == CLK_SRC_SEL_A::CLOCK_32KHZ
154    }
155    #[doc = "Checks if the value of the field is `CLOCK_16KHZ`"]
156    #[inline(always)]
157    pub fn is_clock_16khz(&self) -> bool {
158        **self == CLK_SRC_SEL_A::CLOCK_16KHZ
159    }
160}
161impl core::ops::Deref for CLK_SRC_SEL_R {
162    type Target = crate::FieldReader<bool, CLK_SRC_SEL_A>;
163    #[inline(always)]
164    fn deref(&self) -> &Self::Target {
165        &self.0
166    }
167}
168#[doc = "Field `CLK_SRC_SEL` writer - Select the clock source"]
169pub struct CLK_SRC_SEL_W<'a> {
170    w: &'a mut W,
171}
172impl<'a> CLK_SRC_SEL_W<'a> {
173    #[doc = r"Writes `variant` to the field"]
174    #[inline(always)]
175    pub fn variant(self, variant: CLK_SRC_SEL_A) -> &'a mut W {
176        self.bit(variant.into())
177    }
178    #[doc = "Clock source is 32KHz"]
179    #[inline(always)]
180    pub fn clock_32khz(self) -> &'a mut W {
181        self.variant(CLK_SRC_SEL_A::CLOCK_32KHZ)
182    }
183    #[doc = "Clock source is 16KHz"]
184    #[inline(always)]
185    pub fn clock_16khz(self) -> &'a mut W {
186        self.variant(CLK_SRC_SEL_A::CLOCK_16KHZ)
187    }
188    #[doc = r"Sets the field bit"]
189    #[inline(always)]
190    pub fn set_bit(self) -> &'a mut W {
191        self.bit(true)
192    }
193    #[doc = r"Clears the field bit"]
194    #[inline(always)]
195    pub fn clear_bit(self) -> &'a mut W {
196        self.bit(false)
197    }
198    #[doc = r"Writes raw bits to the field"]
199    #[inline(always)]
200    pub fn bit(self, value: bool) -> &'a mut W {
201        self.w.bits =
202            (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1);
203        self.w
204    }
205}
206#[doc = "Activate or deactive interrupt trigger signal 0\n\nValue on reset: 0"]
207#[derive(Clone, Copy, Debug, PartialEq)]
208pub enum INT_MASK_N_0_A {
209    #[doc = "0: Unmask the interrupt"]
210    UNMASK = 0,
211    #[doc = "1: Mask the interrupt"]
212    MASK = 1,
213}
214impl From<INT_MASK_N_0_A> for bool {
215    #[inline(always)]
216    fn from(variant: INT_MASK_N_0_A) -> Self {
217        variant as u8 != 0
218    }
219}
220#[doc = "Field `INT_MASK_N_0` reader - Activate or deactive interrupt trigger signal 0"]
221pub struct INT_MASK_N_0_R(crate::FieldReader<bool, INT_MASK_N_0_A>);
222impl INT_MASK_N_0_R {
223    #[inline(always)]
224    pub(crate) fn new(bits: bool) -> Self {
225        INT_MASK_N_0_R(crate::FieldReader::new(bits))
226    }
227    #[doc = r"Get enumerated values variant"]
228    #[inline(always)]
229    pub fn variant(&self) -> INT_MASK_N_0_A {
230        match self.bits {
231            false => INT_MASK_N_0_A::UNMASK,
232            true => INT_MASK_N_0_A::MASK,
233        }
234    }
235    #[doc = "Checks if the value of the field is `UNMASK`"]
236    #[inline(always)]
237    pub fn is_unmask(&self) -> bool {
238        **self == INT_MASK_N_0_A::UNMASK
239    }
240    #[doc = "Checks if the value of the field is `MASK`"]
241    #[inline(always)]
242    pub fn is_mask(&self) -> bool {
243        **self == INT_MASK_N_0_A::MASK
244    }
245}
246impl core::ops::Deref for INT_MASK_N_0_R {
247    type Target = crate::FieldReader<bool, INT_MASK_N_0_A>;
248    #[inline(always)]
249    fn deref(&self) -> &Self::Target {
250        &self.0
251    }
252}
253#[doc = "Field `INT_MASK_N_0` writer - Activate or deactive interrupt trigger signal 0"]
254pub struct INT_MASK_N_0_W<'a> {
255    w: &'a mut W,
256}
257impl<'a> INT_MASK_N_0_W<'a> {
258    #[doc = r"Writes `variant` to the field"]
259    #[inline(always)]
260    pub fn variant(self, variant: INT_MASK_N_0_A) -> &'a mut W {
261        self.bit(variant.into())
262    }
263    #[doc = "Unmask the interrupt"]
264    #[inline(always)]
265    pub fn unmask(self) -> &'a mut W {
266        self.variant(INT_MASK_N_0_A::UNMASK)
267    }
268    #[doc = "Mask the interrupt"]
269    #[inline(always)]
270    pub fn mask(self) -> &'a mut W {
271        self.variant(INT_MASK_N_0_A::MASK)
272    }
273    #[doc = r"Sets the field bit"]
274    #[inline(always)]
275    pub fn set_bit(self) -> &'a mut W {
276        self.bit(true)
277    }
278    #[doc = r"Clears the field bit"]
279    #[inline(always)]
280    pub fn clear_bit(self) -> &'a mut W {
281        self.bit(false)
282    }
283    #[doc = r"Writes raw bits to the field"]
284    #[inline(always)]
285    pub fn bit(self, value: bool) -> &'a mut W {
286        self.w.bits =
287            (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2);
288        self.w
289    }
290}
291#[doc = "Activate or deactive interrupt trigger signal 1"]
292pub type INT_MASK_N_1_A = INT_MASK_N_0_A;
293#[doc = "Field `INT_MASK_N_1` reader - Activate or deactive interrupt trigger signal 1"]
294pub type INT_MASK_N_1_R = INT_MASK_N_0_R;
295#[doc = "Field `INT_MASK_N_1` writer - Activate or deactive interrupt trigger signal 1"]
296pub struct INT_MASK_N_1_W<'a> {
297    w: &'a mut W,
298}
299impl<'a> INT_MASK_N_1_W<'a> {
300    #[doc = r"Writes `variant` to the field"]
301    #[inline(always)]
302    pub fn variant(self, variant: INT_MASK_N_1_A) -> &'a mut W {
303        self.bit(variant.into())
304    }
305    #[doc = "Unmask the interrupt"]
306    #[inline(always)]
307    pub fn unmask(self) -> &'a mut W {
308        self.variant(INT_MASK_N_1_A::UNMASK)
309    }
310    #[doc = "Mask the interrupt"]
311    #[inline(always)]
312    pub fn mask(self) -> &'a mut W {
313        self.variant(INT_MASK_N_1_A::MASK)
314    }
315    #[doc = r"Sets the field bit"]
316    #[inline(always)]
317    pub fn set_bit(self) -> &'a mut W {
318        self.bit(true)
319    }
320    #[doc = r"Clears the field bit"]
321    #[inline(always)]
322    pub fn clear_bit(self) -> &'a mut W {
323        self.bit(false)
324    }
325    #[doc = r"Writes raw bits to the field"]
326    #[inline(always)]
327    pub fn bit(self, value: bool) -> &'a mut W {
328        self.w.bits =
329            (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3);
330        self.w
331    }
332}
333#[doc = "Activate or deactive interrupt trigger signal 2"]
334pub type INT_MASK_N_2_A = INT_MASK_N_0_A;
335#[doc = "Field `INT_MASK_N_2` reader - Activate or deactive interrupt trigger signal 2"]
336pub type INT_MASK_N_2_R = INT_MASK_N_0_R;
337#[doc = "Field `INT_MASK_N_2` writer - Activate or deactive interrupt trigger signal 2"]
338pub struct INT_MASK_N_2_W<'a> {
339    w: &'a mut W,
340}
341impl<'a> INT_MASK_N_2_W<'a> {
342    #[doc = r"Writes `variant` to the field"]
343    #[inline(always)]
344    pub fn variant(self, variant: INT_MASK_N_2_A) -> &'a mut W {
345        self.bit(variant.into())
346    }
347    #[doc = "Unmask the interrupt"]
348    #[inline(always)]
349    pub fn unmask(self) -> &'a mut W {
350        self.variant(INT_MASK_N_2_A::UNMASK)
351    }
352    #[doc = "Mask the interrupt"]
353    #[inline(always)]
354    pub fn mask(self) -> &'a mut W {
355        self.variant(INT_MASK_N_2_A::MASK)
356    }
357    #[doc = r"Sets the field bit"]
358    #[inline(always)]
359    pub fn set_bit(self) -> &'a mut W {
360        self.bit(true)
361    }
362    #[doc = r"Clears the field bit"]
363    #[inline(always)]
364    pub fn clear_bit(self) -> &'a mut W {
365        self.bit(false)
366    }
367    #[doc = r"Writes raw bits to the field"]
368    #[inline(always)]
369    pub fn bit(self, value: bool) -> &'a mut W {
370        self.w.bits =
371            (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4);
372        self.w
373    }
374}
375#[doc = "Activate or deactive interrupt trigger signal 3"]
376pub type INT_MASK_N_3_A = INT_MASK_N_0_A;
377#[doc = "Field `INT_MASK_N_3` reader - Activate or deactive interrupt trigger signal 3"]
378pub type INT_MASK_N_3_R = INT_MASK_N_0_R;
379#[doc = "Field `INT_MASK_N_3` writer - Activate or deactive interrupt trigger signal 3"]
380pub struct INT_MASK_N_3_W<'a> {
381    w: &'a mut W,
382}
383impl<'a> INT_MASK_N_3_W<'a> {
384    #[doc = r"Writes `variant` to the field"]
385    #[inline(always)]
386    pub fn variant(self, variant: INT_MASK_N_3_A) -> &'a mut W {
387        self.bit(variant.into())
388    }
389    #[doc = "Unmask the interrupt"]
390    #[inline(always)]
391    pub fn unmask(self) -> &'a mut W {
392        self.variant(INT_MASK_N_3_A::UNMASK)
393    }
394    #[doc = "Mask the interrupt"]
395    #[inline(always)]
396    pub fn mask(self) -> &'a mut W {
397        self.variant(INT_MASK_N_3_A::MASK)
398    }
399    #[doc = r"Sets the field bit"]
400    #[inline(always)]
401    pub fn set_bit(self) -> &'a mut W {
402        self.bit(true)
403    }
404    #[doc = r"Clears the field bit"]
405    #[inline(always)]
406    pub fn clear_bit(self) -> &'a mut W {
407        self.bit(false)
408    }
409    #[doc = r"Writes raw bits to the field"]
410    #[inline(always)]
411    pub fn bit(self, value: bool) -> &'a mut W {
412        self.w.bits =
413            (self.w.bits & !(0x01 << 5)) | ((value as u32 & 0x01) << 5);
414        self.w
415    }
416}
417#[doc = "Activate or deactive interrupt trigger signal 4"]
418pub type INT_MASK_N_4_A = INT_MASK_N_0_A;
419#[doc = "Field `INT_MASK_N_4` reader - Activate or deactive interrupt trigger signal 4"]
420pub type INT_MASK_N_4_R = INT_MASK_N_0_R;
421#[doc = "Field `INT_MASK_N_4` writer - Activate or deactive interrupt trigger signal 4"]
422pub struct INT_MASK_N_4_W<'a> {
423    w: &'a mut W,
424}
425impl<'a> INT_MASK_N_4_W<'a> {
426    #[doc = r"Writes `variant` to the field"]
427    #[inline(always)]
428    pub fn variant(self, variant: INT_MASK_N_4_A) -> &'a mut W {
429        self.bit(variant.into())
430    }
431    #[doc = "Unmask the interrupt"]
432    #[inline(always)]
433    pub fn unmask(self) -> &'a mut W {
434        self.variant(INT_MASK_N_4_A::UNMASK)
435    }
436    #[doc = "Mask the interrupt"]
437    #[inline(always)]
438    pub fn mask(self) -> &'a mut W {
439        self.variant(INT_MASK_N_4_A::MASK)
440    }
441    #[doc = r"Sets the field bit"]
442    #[inline(always)]
443    pub fn set_bit(self) -> &'a mut W {
444        self.bit(true)
445    }
446    #[doc = r"Clears the field bit"]
447    #[inline(always)]
448    pub fn clear_bit(self) -> &'a mut W {
449        self.bit(false)
450    }
451    #[doc = r"Writes raw bits to the field"]
452    #[inline(always)]
453    pub fn bit(self, value: bool) -> &'a mut W {
454        self.w.bits =
455            (self.w.bits & !(0x01 << 6)) | ((value as u32 & 0x01) << 6);
456        self.w
457    }
458}
459#[doc = "Activate or deactive interrupt trigger signal 5"]
460pub type INT_MASK_N_5_A = INT_MASK_N_0_A;
461#[doc = "Field `INT_MASK_N_5` reader - Activate or deactive interrupt trigger signal 5"]
462pub type INT_MASK_N_5_R = INT_MASK_N_0_R;
463#[doc = "Field `INT_MASK_N_5` writer - Activate or deactive interrupt trigger signal 5"]
464pub struct INT_MASK_N_5_W<'a> {
465    w: &'a mut W,
466}
467impl<'a> INT_MASK_N_5_W<'a> {
468    #[doc = r"Writes `variant` to the field"]
469    #[inline(always)]
470    pub fn variant(self, variant: INT_MASK_N_5_A) -> &'a mut W {
471        self.bit(variant.into())
472    }
473    #[doc = "Unmask the interrupt"]
474    #[inline(always)]
475    pub fn unmask(self) -> &'a mut W {
476        self.variant(INT_MASK_N_5_A::UNMASK)
477    }
478    #[doc = "Mask the interrupt"]
479    #[inline(always)]
480    pub fn mask(self) -> &'a mut W {
481        self.variant(INT_MASK_N_5_A::MASK)
482    }
483    #[doc = r"Sets the field bit"]
484    #[inline(always)]
485    pub fn set_bit(self) -> &'a mut W {
486        self.bit(true)
487    }
488    #[doc = r"Clears the field bit"]
489    #[inline(always)]
490    pub fn clear_bit(self) -> &'a mut W {
491        self.bit(false)
492    }
493    #[doc = r"Writes raw bits to the field"]
494    #[inline(always)]
495    pub fn bit(self, value: bool) -> &'a mut W {
496        self.w.bits =
497            (self.w.bits & !(0x01 << 7)) | ((value as u32 & 0x01) << 7);
498        self.w
499    }
500}
501#[doc = "Activate or deactive interrupt trigger signal 6"]
502pub type INT_MASK_N_6_A = INT_MASK_N_0_A;
503#[doc = "Field `INT_MASK_N_6` reader - Activate or deactive interrupt trigger signal 6"]
504pub type INT_MASK_N_6_R = INT_MASK_N_0_R;
505#[doc = "Field `INT_MASK_N_6` writer - Activate or deactive interrupt trigger signal 6"]
506pub struct INT_MASK_N_6_W<'a> {
507    w: &'a mut W,
508}
509impl<'a> INT_MASK_N_6_W<'a> {
510    #[doc = r"Writes `variant` to the field"]
511    #[inline(always)]
512    pub fn variant(self, variant: INT_MASK_N_6_A) -> &'a mut W {
513        self.bit(variant.into())
514    }
515    #[doc = "Unmask the interrupt"]
516    #[inline(always)]
517    pub fn unmask(self) -> &'a mut W {
518        self.variant(INT_MASK_N_6_A::UNMASK)
519    }
520    #[doc = "Mask the interrupt"]
521    #[inline(always)]
522    pub fn mask(self) -> &'a mut W {
523        self.variant(INT_MASK_N_6_A::MASK)
524    }
525    #[doc = r"Sets the field bit"]
526    #[inline(always)]
527    pub fn set_bit(self) -> &'a mut W {
528        self.bit(true)
529    }
530    #[doc = r"Clears the field bit"]
531    #[inline(always)]
532    pub fn clear_bit(self) -> &'a mut W {
533        self.bit(false)
534    }
535    #[doc = r"Writes raw bits to the field"]
536    #[inline(always)]
537    pub fn bit(self, value: bool) -> &'a mut W {
538        self.w.bits =
539            (self.w.bits & !(0x01 << 8)) | ((value as u32 & 0x01) << 8);
540        self.w
541    }
542}
543#[doc = "Activate or deactive interrupt trigger signal 7"]
544pub type INT_MASK_N_7_A = INT_MASK_N_0_A;
545#[doc = "Field `INT_MASK_N_7` reader - Activate or deactive interrupt trigger signal 7"]
546pub type INT_MASK_N_7_R = INT_MASK_N_0_R;
547#[doc = "Field `INT_MASK_N_7` writer - Activate or deactive interrupt trigger signal 7"]
548pub struct INT_MASK_N_7_W<'a> {
549    w: &'a mut W,
550}
551impl<'a> INT_MASK_N_7_W<'a> {
552    #[doc = r"Writes `variant` to the field"]
553    #[inline(always)]
554    pub fn variant(self, variant: INT_MASK_N_7_A) -> &'a mut W {
555        self.bit(variant.into())
556    }
557    #[doc = "Unmask the interrupt"]
558    #[inline(always)]
559    pub fn unmask(self) -> &'a mut W {
560        self.variant(INT_MASK_N_7_A::UNMASK)
561    }
562    #[doc = "Mask the interrupt"]
563    #[inline(always)]
564    pub fn mask(self) -> &'a mut W {
565        self.variant(INT_MASK_N_7_A::MASK)
566    }
567    #[doc = r"Sets the field bit"]
568    #[inline(always)]
569    pub fn set_bit(self) -> &'a mut W {
570        self.bit(true)
571    }
572    #[doc = r"Clears the field bit"]
573    #[inline(always)]
574    pub fn clear_bit(self) -> &'a mut W {
575        self.bit(false)
576    }
577    #[doc = r"Writes raw bits to the field"]
578    #[inline(always)]
579    pub fn bit(self, value: bool) -> &'a mut W {
580        self.w.bits =
581            (self.w.bits & !(0x01 << 9)) | ((value as u32 & 0x01) << 9);
582        self.w
583    }
584}
585#[doc = "Field `FFE_TO_PERIOD` reader - FFE Kick Off (timeout) perdiod configuration (value in registers = period, max value is 100). NOTE : If 0x0, The Event Counter will be turn off and all the Signals to PMU will be de-asserted. NOTE : If PMU_TO_PERIOD is 0x0, FFE Kick off signal will not trigger until FFE is alive."]
586pub struct FFE_TO_PERIOD_R(crate::FieldReader<u8, u8>);
587impl FFE_TO_PERIOD_R {
588    #[inline(always)]
589    pub(crate) fn new(bits: u8) -> Self {
590        FFE_TO_PERIOD_R(crate::FieldReader::new(bits))
591    }
592}
593impl core::ops::Deref for FFE_TO_PERIOD_R {
594    type Target = crate::FieldReader<u8, u8>;
595    #[inline(always)]
596    fn deref(&self) -> &Self::Target {
597        &self.0
598    }
599}
600#[doc = "Field `FFE_TO_PERIOD` writer - FFE Kick Off (timeout) perdiod configuration (value in registers = period, max value is 100). NOTE : If 0x0, The Event Counter will be turn off and all the Signals to PMU will be de-asserted. NOTE : If PMU_TO_PERIOD is 0x0, FFE Kick off signal will not trigger until FFE is alive."]
601pub struct FFE_TO_PERIOD_W<'a> {
602    w: &'a mut W,
603}
604impl<'a> FFE_TO_PERIOD_W<'a> {
605    #[doc = r"Writes raw bits to the field"]
606    #[inline(always)]
607    pub unsafe fn bits(self, value: u8) -> &'a mut W {
608        self.w.bits =
609            (self.w.bits & !(0xff << 10)) | ((value as u32 & 0xff) << 10);
610        self.w
611    }
612}
613#[doc = "Field `PMU_TO_PERIO` reader - PMU Kick Off (Time out Period) Configuration PMU Kick Off signal will assert N cycles (value in field) before FFE kick signal asserting. NOTE : For 0x0, FFE Time out Event will be used to wake up FFE power domain."]
614pub struct PMU_TO_PERIO_R(crate::FieldReader<u8, u8>);
615impl PMU_TO_PERIO_R {
616    #[inline(always)]
617    pub(crate) fn new(bits: u8) -> Self {
618        PMU_TO_PERIO_R(crate::FieldReader::new(bits))
619    }
620}
621impl core::ops::Deref for PMU_TO_PERIO_R {
622    type Target = crate::FieldReader<u8, u8>;
623    #[inline(always)]
624    fn deref(&self) -> &Self::Target {
625        &self.0
626    }
627}
628#[doc = "Field `PMU_TO_PERIO` writer - PMU Kick Off (Time out Period) Configuration PMU Kick Off signal will assert N cycles (value in field) before FFE kick signal asserting. NOTE : For 0x0, FFE Time out Event will be used to wake up FFE power domain."]
629pub struct PMU_TO_PERIO_W<'a> {
630    w: &'a mut W,
631}
632impl<'a> PMU_TO_PERIO_W<'a> {
633    #[doc = r"Writes raw bits to the field"]
634    #[inline(always)]
635    pub unsafe fn bits(self, value: u8) -> &'a mut W {
636        self.w.bits =
637            (self.w.bits & !(0x0f << 18)) | ((value as u32 & 0x0f) << 18);
638        self.w
639    }
640}
641impl R {
642    #[doc = "Bit 0 - Field to enable the timer/counter"]
643    #[inline(always)]
644    pub fn spt_en(&self) -> SPT_EN_R {
645        SPT_EN_R::new((self.bits & 0x01) != 0)
646    }
647    #[doc = "Bit 1 - Select the clock source"]
648    #[inline(always)]
649    pub fn clk_src_sel(&self) -> CLK_SRC_SEL_R {
650        CLK_SRC_SEL_R::new(((self.bits >> 1) & 0x01) != 0)
651    }
652    #[doc = "Bit 2 - Activate or deactive interrupt trigger signal 0"]
653    #[inline(always)]
654    pub fn int_mask_n_0(&self) -> INT_MASK_N_0_R {
655        INT_MASK_N_0_R::new(((self.bits >> 2) & 0x01) != 0)
656    }
657    #[doc = "Bit 3 - Activate or deactive interrupt trigger signal 1"]
658    #[inline(always)]
659    pub fn int_mask_n_1(&self) -> INT_MASK_N_1_R {
660        INT_MASK_N_1_R::new(((self.bits >> 3) & 0x01) != 0)
661    }
662    #[doc = "Bit 4 - Activate or deactive interrupt trigger signal 2"]
663    #[inline(always)]
664    pub fn int_mask_n_2(&self) -> INT_MASK_N_2_R {
665        INT_MASK_N_2_R::new(((self.bits >> 4) & 0x01) != 0)
666    }
667    #[doc = "Bit 5 - Activate or deactive interrupt trigger signal 3"]
668    #[inline(always)]
669    pub fn int_mask_n_3(&self) -> INT_MASK_N_3_R {
670        INT_MASK_N_3_R::new(((self.bits >> 5) & 0x01) != 0)
671    }
672    #[doc = "Bit 6 - Activate or deactive interrupt trigger signal 4"]
673    #[inline(always)]
674    pub fn int_mask_n_4(&self) -> INT_MASK_N_4_R {
675        INT_MASK_N_4_R::new(((self.bits >> 6) & 0x01) != 0)
676    }
677    #[doc = "Bit 7 - Activate or deactive interrupt trigger signal 5"]
678    #[inline(always)]
679    pub fn int_mask_n_5(&self) -> INT_MASK_N_5_R {
680        INT_MASK_N_5_R::new(((self.bits >> 7) & 0x01) != 0)
681    }
682    #[doc = "Bit 8 - Activate or deactive interrupt trigger signal 6"]
683    #[inline(always)]
684    pub fn int_mask_n_6(&self) -> INT_MASK_N_6_R {
685        INT_MASK_N_6_R::new(((self.bits >> 8) & 0x01) != 0)
686    }
687    #[doc = "Bit 9 - Activate or deactive interrupt trigger signal 7"]
688    #[inline(always)]
689    pub fn int_mask_n_7(&self) -> INT_MASK_N_7_R {
690        INT_MASK_N_7_R::new(((self.bits >> 9) & 0x01) != 0)
691    }
692    #[doc = "Bits 10:17 - FFE Kick Off (timeout) perdiod configuration (value in registers = period, max value is 100). NOTE : If 0x0, The Event Counter will be turn off and all the Signals to PMU will be de-asserted. NOTE : If PMU_TO_PERIOD is 0x0, FFE Kick off signal will not trigger until FFE is alive."]
693    #[inline(always)]
694    pub fn ffe_to_period(&self) -> FFE_TO_PERIOD_R {
695        FFE_TO_PERIOD_R::new(((self.bits >> 10) & 0xff) as u8)
696    }
697    #[doc = "Bits 18:21 - PMU Kick Off (Time out Period) Configuration PMU Kick Off signal will assert N cycles (value in field) before FFE kick signal asserting. NOTE : For 0x0, FFE Time out Event will be used to wake up FFE power domain."]
698    #[inline(always)]
699    pub fn pmu_to_perio(&self) -> PMU_TO_PERIO_R {
700        PMU_TO_PERIO_R::new(((self.bits >> 18) & 0x0f) as u8)
701    }
702}
703impl W {
704    #[doc = "Bit 0 - Field to enable the timer/counter"]
705    #[inline(always)]
706    pub fn spt_en(&mut self) -> SPT_EN_W {
707        SPT_EN_W { w: self }
708    }
709    #[doc = "Bit 1 - Select the clock source"]
710    #[inline(always)]
711    pub fn clk_src_sel(&mut self) -> CLK_SRC_SEL_W {
712        CLK_SRC_SEL_W { w: self }
713    }
714    #[doc = "Bit 2 - Activate or deactive interrupt trigger signal 0"]
715    #[inline(always)]
716    pub fn int_mask_n_0(&mut self) -> INT_MASK_N_0_W {
717        INT_MASK_N_0_W { w: self }
718    }
719    #[doc = "Bit 3 - Activate or deactive interrupt trigger signal 1"]
720    #[inline(always)]
721    pub fn int_mask_n_1(&mut self) -> INT_MASK_N_1_W {
722        INT_MASK_N_1_W { w: self }
723    }
724    #[doc = "Bit 4 - Activate or deactive interrupt trigger signal 2"]
725    #[inline(always)]
726    pub fn int_mask_n_2(&mut self) -> INT_MASK_N_2_W {
727        INT_MASK_N_2_W { w: self }
728    }
729    #[doc = "Bit 5 - Activate or deactive interrupt trigger signal 3"]
730    #[inline(always)]
731    pub fn int_mask_n_3(&mut self) -> INT_MASK_N_3_W {
732        INT_MASK_N_3_W { w: self }
733    }
734    #[doc = "Bit 6 - Activate or deactive interrupt trigger signal 4"]
735    #[inline(always)]
736    pub fn int_mask_n_4(&mut self) -> INT_MASK_N_4_W {
737        INT_MASK_N_4_W { w: self }
738    }
739    #[doc = "Bit 7 - Activate or deactive interrupt trigger signal 5"]
740    #[inline(always)]
741    pub fn int_mask_n_5(&mut self) -> INT_MASK_N_5_W {
742        INT_MASK_N_5_W { w: self }
743    }
744    #[doc = "Bit 8 - Activate or deactive interrupt trigger signal 6"]
745    #[inline(always)]
746    pub fn int_mask_n_6(&mut self) -> INT_MASK_N_6_W {
747        INT_MASK_N_6_W { w: self }
748    }
749    #[doc = "Bit 9 - Activate or deactive interrupt trigger signal 7"]
750    #[inline(always)]
751    pub fn int_mask_n_7(&mut self) -> INT_MASK_N_7_W {
752        INT_MASK_N_7_W { w: self }
753    }
754    #[doc = "Bits 10:17 - FFE Kick Off (timeout) perdiod configuration (value in registers = period, max value is 100). NOTE : If 0x0, The Event Counter will be turn off and all the Signals to PMU will be de-asserted. NOTE : If PMU_TO_PERIOD is 0x0, FFE Kick off signal will not trigger until FFE is alive."]
755    #[inline(always)]
756    pub fn ffe_to_period(&mut self) -> FFE_TO_PERIOD_W {
757        FFE_TO_PERIOD_W { w: self }
758    }
759    #[doc = "Bits 18:21 - PMU Kick Off (Time out Period) Configuration PMU Kick Off signal will assert N cycles (value in field) before FFE kick signal asserting. NOTE : For 0x0, FFE Time out Event will be used to wake up FFE power domain."]
760    #[inline(always)]
761    pub fn pmu_to_perio(&mut self) -> PMU_TO_PERIO_W {
762        PMU_TO_PERIO_W { w: self }
763    }
764    #[doc = "Writes raw bits to the register."]
765    #[inline(always)]
766    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
767        self.0.bits(bits);
768        self
769    }
770}
771#[doc = "Configuration register for the simple periodic timer\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [spt_cfg](index.html) module"]
772pub struct SPT_CFG_SPEC;
773impl crate::RegisterSpec for SPT_CFG_SPEC {
774    type Ux = u32;
775}
776#[doc = "`read()` method returns [spt_cfg::R](R) reader structure"]
777impl crate::Readable for SPT_CFG_SPEC {
778    type Reader = R;
779}
780#[doc = "`write(|w| ..)` method takes [spt_cfg::W](W) writer structure"]
781impl crate::Writable for SPT_CFG_SPEC {
782    type Writer = W;
783}
784#[doc = "`reset()` method sets SPT_CFG to value 0"]
785impl crate::Resettable for SPT_CFG_SPEC {
786    #[inline(always)]
787    fn reset_value() -> Self::Ux {
788        0
789    }
790}
eos_s3/spt/spt_cfg.rs

eos_s3/spt/
spt_cfg.rs
