eos_s3/spi_tlc/
dmadebugctl1.rs

1#[doc = "Register `DMADEBUGCTL1` reader"]
2pub struct R(crate::R<DMADEBUGCTL1_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<DMADEBUGCTL1_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<DMADEBUGCTL1_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<DMADEBUGCTL1_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `DMADEBUGCTL1` writer"]
17pub struct W(crate::W<DMADEBUGCTL1_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<DMADEBUGCTL1_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<DMADEBUGCTL1_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<DMADEBUGCTL1_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `DmaClear` reader - Set bit to Reset the DMA engineer. Firmware needs to clear it before kick off the new DMA Transfer. Need to do a dummy Read on this SFR after program this bit"]
38pub struct DMACLEAR_R(crate::FieldReader<bool, bool>);
39impl DMACLEAR_R {
40    #[inline(always)]
41    pub(crate) fn new(bits: bool) -> Self {
42        DMACLEAR_R(crate::FieldReader::new(bits))
43    }
44}
45impl core::ops::Deref for DMACLEAR_R {
46    type Target = crate::FieldReader<bool, bool>;
47    #[inline(always)]
48    fn deref(&self) -> &Self::Target {
49        &self.0
50    }
51}
52#[doc = "Field `DmaClear` writer - Set bit to Reset the DMA engineer. Firmware needs to clear it before kick off the new DMA Transfer. Need to do a dummy Read on this SFR after program this bit"]
53pub struct DMACLEAR_W<'a> {
54    w: &'a mut W,
55}
56impl<'a> DMACLEAR_W<'a> {
57    #[doc = r"Sets the field bit"]
58    #[inline(always)]
59    pub fn set_bit(self) -> &'a mut W {
60        self.bit(true)
61    }
62    #[doc = r"Clears the field bit"]
63    #[inline(always)]
64    pub fn clear_bit(self) -> &'a mut W {
65        self.bit(false)
66    }
67    #[doc = r"Writes raw bits to the field"]
68    #[inline(always)]
69    pub fn bit(self, value: bool) -> &'a mut W {
70        self.w.bits = (self.w.bits & !0x01) | (value as u8 & 0x01);
71        self.w
72    }
73}
74impl R {
75    #[doc = "Bit 0 - Set bit to Reset the DMA engineer. Firmware needs to clear it before kick off the new DMA Transfer. Need to do a dummy Read on this SFR after program this bit"]
76    #[inline(always)]
77    pub fn dma_clear(&self) -> DMACLEAR_R {
78        DMACLEAR_R::new((self.bits & 0x01) != 0)
79    }
80}
81impl W {
82    #[doc = "Bit 0 - Set bit to Reset the DMA engineer. Firmware needs to clear it before kick off the new DMA Transfer. Need to do a dummy Read on this SFR after program this bit"]
83    #[inline(always)]
84    pub fn dma_clear(&mut self) -> DMACLEAR_W {
85        DMACLEAR_W { w: self }
86    }
87    #[doc = "Writes raw bits to the register."]
88    #[inline(always)]
89    pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
90        self.0.bits(bits);
91        self
92    }
93}
94#[doc = "Set bit to Reset the DMA engineer. Firmware needs to clear it before kick off the new DMA Transfer. Need to do a dummy Read on this SFR after program this bit\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dmadebugctl1](index.html) module"]
95pub struct DMADEBUGCTL1_SPEC;
96impl crate::RegisterSpec for DMADEBUGCTL1_SPEC {
97    type Ux = u8;
98}
99#[doc = "`read()` method returns [dmadebugctl1::R](R) reader structure"]
100impl crate::Readable for DMADEBUGCTL1_SPEC {
101    type Reader = R;
102}
103#[doc = "`write(|w| ..)` method takes [dmadebugctl1::W](W) writer structure"]
104impl crate::Writable for DMADEBUGCTL1_SPEC {
105    type Writer = W;
106}
107#[doc = "`reset()` method sets DMADEBUGCTL1 to value 0"]
108impl crate::Resettable for DMADEBUGCTL1_SPEC {
109    #[inline(always)]
110    fn reset_value() -> Self::Ux {
111        0
112    }
113}
eos_s3/spi_tlc/dmadebugctl1.rs

eos_s3/spi_tlc/
dmadebugctl1.rs
