eos_s3/spi_tlc/
dmaburstsize1.rs

1#[doc = "Register `DMABURSTSIZE1` reader"]
2pub struct R(crate::R<DMABURSTSIZE1_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<DMABURSTSIZE1_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<DMABURSTSIZE1_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<DMABURSTSIZE1_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `DMABURSTSIZE1` writer"]
17pub struct W(crate::W<DMABURSTSIZE1_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<DMABURSTSIZE1_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<DMABURSTSIZE1_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<DMABURSTSIZE1_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `DMABurstSize1` reader - MSB Byte of DMA transfer size. It is representing BurstSize\\[15:8\\]"]
38pub struct DMABURSTSIZE1_R(crate::FieldReader<u8, u8>);
39impl DMABURSTSIZE1_R {
40    #[inline(always)]
41    pub(crate) fn new(bits: u8) -> Self {
42        DMABURSTSIZE1_R(crate::FieldReader::new(bits))
43    }
44}
45impl core::ops::Deref for DMABURSTSIZE1_R {
46    type Target = crate::FieldReader<u8, u8>;
47    #[inline(always)]
48    fn deref(&self) -> &Self::Target {
49        &self.0
50    }
51}
52#[doc = "Field `DMABurstSize1` writer - MSB Byte of DMA transfer size. It is representing BurstSize\\[15:8\\]"]
53pub struct DMABURSTSIZE1_W<'a> {
54    w: &'a mut W,
55}
56impl<'a> DMABURSTSIZE1_W<'a> {
57    #[doc = r"Writes raw bits to the field"]
58    #[inline(always)]
59    pub unsafe fn bits(self, value: u8) -> &'a mut W {
60        self.w.bits = value as u8;
61        self.w
62    }
63}
64impl R {
65    #[doc = "Bits 0:7 - MSB Byte of DMA transfer size. It is representing BurstSize\\[15:8\\]"]
66    #[inline(always)]
67    pub fn dmaburst_size1(&self) -> DMABURSTSIZE1_R {
68        DMABURSTSIZE1_R::new(self.bits as u8)
69    }
70}
71impl W {
72    #[doc = "Bits 0:7 - MSB Byte of DMA transfer size. It is representing BurstSize\\[15:8\\]"]
73    #[inline(always)]
74    pub fn dmaburst_size1(&mut self) -> DMABURSTSIZE1_W {
75        DMABURSTSIZE1_W { w: self }
76    }
77    #[doc = "Writes raw bits to the register."]
78    #[inline(always)]
79    pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
80        self.0.bits(bits);
81        self
82    }
83}
84#[doc = "MSB Byte of DMA transfer size. it is representing BurstSize\\[15:8\\]. Max transfer size is 64KB, Once it is written, DMA will be kickoff unless DmaBurstSize0\\[1:0\\]
85= 2'b10. Min. Transfer Size will be 4 Bytes once DMA is Kick Off ({DmaBurstSize0, DmaBurstSize1} == 0x0}\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dmaburstsize1](index.html) module"]
86pub struct DMABURSTSIZE1_SPEC;
87impl crate::RegisterSpec for DMABURSTSIZE1_SPEC {
88    type Ux = u8;
89}
90#[doc = "`read()` method returns [dmaburstsize1::R](R) reader structure"]
91impl crate::Readable for DMABURSTSIZE1_SPEC {
92    type Reader = R;
93}
94#[doc = "`write(|w| ..)` method takes [dmaburstsize1::W](W) writer structure"]
95impl crate::Writable for DMABURSTSIZE1_SPEC {
96    type Writer = W;
97}
98#[doc = "`reset()` method sets DMABURSTSIZE1 to value 0"]
99impl crate::Resettable for DMABURSTSIZE1_SPEC {
100    #[inline(always)]
101    fn reset_value() -> Self::Ux {
102        0
103    }
104}
eos_s3/spi_tlc/dmaburstsize1.rs

eos_s3/spi_tlc/
dmaburstsize1.rs
