eos_s3/pmu/
ffe_mem_ctrl_1.rs

1#[doc = "Register `FFE_MEM_CTRL_1` reader"]
2pub struct R(crate::R<FFE_MEM_CTRL_1_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<FFE_MEM_CTRL_1_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<FFE_MEM_CTRL_1_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<FFE_MEM_CTRL_1_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `FFE_MEM_CTRL_1` writer"]
17pub struct W(crate::W<FFE_MEM_CTRL_1_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<FFE_MEM_CTRL_1_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<FFE_MEM_CTRL_1_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<FFE_MEM_CTRL_1_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Control SD pin of CM0 8Kx40\n\nValue on reset: 0"]
38#[derive(Clone, Copy, Debug, PartialEq)]
39pub enum CTRL_FFE_SRAM_SD_CM0_A {
40    #[doc = "0: Disable the shut down function of SRAM Macro."]
41    DISABLE_SHUT_DOWN = 0,
42    #[doc = "1: Enable the shut down function of SRAM Macro, Memory content will be lost."]
43    ENABLE_SHUT_DOWN = 1,
44}
45impl From<CTRL_FFE_SRAM_SD_CM0_A> for bool {
46    #[inline(always)]
47    fn from(variant: CTRL_FFE_SRAM_SD_CM0_A) -> Self {
48        variant as u8 != 0
49    }
50}
51#[doc = "Field `CTRL_FFE_SRAM_SD_CM0` reader - Control SD pin of CM0 8Kx40"]
52pub struct CTRL_FFE_SRAM_SD_CM0_R(
53    crate::FieldReader<bool, CTRL_FFE_SRAM_SD_CM0_A>,
54);
55impl CTRL_FFE_SRAM_SD_CM0_R {
56    #[inline(always)]
57    pub(crate) fn new(bits: bool) -> Self {
58        CTRL_FFE_SRAM_SD_CM0_R(crate::FieldReader::new(bits))
59    }
60    #[doc = r"Get enumerated values variant"]
61    #[inline(always)]
62    pub fn variant(&self) -> CTRL_FFE_SRAM_SD_CM0_A {
63        match self.bits {
64            false => CTRL_FFE_SRAM_SD_CM0_A::DISABLE_SHUT_DOWN,
65            true => CTRL_FFE_SRAM_SD_CM0_A::ENABLE_SHUT_DOWN,
66        }
67    }
68    #[doc = "Checks if the value of the field is `DISABLE_SHUT_DOWN`"]
69    #[inline(always)]
70    pub fn is_disable_shut_down(&self) -> bool {
71        **self == CTRL_FFE_SRAM_SD_CM0_A::DISABLE_SHUT_DOWN
72    }
73    #[doc = "Checks if the value of the field is `ENABLE_SHUT_DOWN`"]
74    #[inline(always)]
75    pub fn is_enable_shut_down(&self) -> bool {
76        **self == CTRL_FFE_SRAM_SD_CM0_A::ENABLE_SHUT_DOWN
77    }
78}
79impl core::ops::Deref for CTRL_FFE_SRAM_SD_CM0_R {
80    type Target = crate::FieldReader<bool, CTRL_FFE_SRAM_SD_CM0_A>;
81    #[inline(always)]
82    fn deref(&self) -> &Self::Target {
83        &self.0
84    }
85}
86#[doc = "Field `CTRL_FFE_SRAM_SD_CM0` writer - Control SD pin of CM0 8Kx40"]
87pub struct CTRL_FFE_SRAM_SD_CM0_W<'a> {
88    w: &'a mut W,
89}
90impl<'a> CTRL_FFE_SRAM_SD_CM0_W<'a> {
91    #[doc = r"Writes `variant` to the field"]
92    #[inline(always)]
93    pub fn variant(self, variant: CTRL_FFE_SRAM_SD_CM0_A) -> &'a mut W {
94        self.bit(variant.into())
95    }
96    #[doc = "Disable the shut down function of SRAM Macro."]
97    #[inline(always)]
98    pub fn disable_shut_down(self) -> &'a mut W {
99        self.variant(CTRL_FFE_SRAM_SD_CM0_A::DISABLE_SHUT_DOWN)
100    }
101    #[doc = "Enable the shut down function of SRAM Macro, Memory content will be lost."]
102    #[inline(always)]
103    pub fn enable_shut_down(self) -> &'a mut W {
104        self.variant(CTRL_FFE_SRAM_SD_CM0_A::ENABLE_SHUT_DOWN)
105    }
106    #[doc = r"Sets the field bit"]
107    #[inline(always)]
108    pub fn set_bit(self) -> &'a mut W {
109        self.bit(true)
110    }
111    #[doc = r"Clears the field bit"]
112    #[inline(always)]
113    pub fn clear_bit(self) -> &'a mut W {
114        self.bit(false)
115    }
116    #[doc = r"Writes raw bits to the field"]
117    #[inline(always)]
118    pub fn bit(self, value: bool) -> &'a mut W {
119        self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01);
120        self.w
121    }
122}
123#[doc = "Control SD pin of DM0 1Kx32"]
124pub type CTRL_FFE_SRAM_SD_DM0_A = CTRL_FFE_SRAM_SD_CM0_A;
125#[doc = "Field `CTRL_FFE_SRAM_SD_DM0` reader - Control SD pin of DM0 1Kx32"]
126pub type CTRL_FFE_SRAM_SD_DM0_R = CTRL_FFE_SRAM_SD_CM0_R;
127#[doc = "Field `CTRL_FFE_SRAM_SD_DM0` writer - Control SD pin of DM0 1Kx32"]
128pub struct CTRL_FFE_SRAM_SD_DM0_W<'a> {
129    w: &'a mut W,
130}
131impl<'a> CTRL_FFE_SRAM_SD_DM0_W<'a> {
132    #[doc = r"Writes `variant` to the field"]
133    #[inline(always)]
134    pub fn variant(self, variant: CTRL_FFE_SRAM_SD_DM0_A) -> &'a mut W {
135        self.bit(variant.into())
136    }
137    #[doc = "Disable the shut down function of SRAM Macro."]
138    #[inline(always)]
139    pub fn disable_shut_down(self) -> &'a mut W {
140        self.variant(CTRL_FFE_SRAM_SD_DM0_A::DISABLE_SHUT_DOWN)
141    }
142    #[doc = "Enable the shut down function of SRAM Macro, Memory content will be lost."]
143    #[inline(always)]
144    pub fn enable_shut_down(self) -> &'a mut W {
145        self.variant(CTRL_FFE_SRAM_SD_DM0_A::ENABLE_SHUT_DOWN)
146    }
147    #[doc = r"Sets the field bit"]
148    #[inline(always)]
149    pub fn set_bit(self) -> &'a mut W {
150        self.bit(true)
151    }
152    #[doc = r"Clears the field bit"]
153    #[inline(always)]
154    pub fn clear_bit(self) -> &'a mut W {
155        self.bit(false)
156    }
157    #[doc = r"Writes raw bits to the field"]
158    #[inline(always)]
159    pub fn bit(self, value: bool) -> &'a mut W {
160        self.w.bits =
161            (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1);
162        self.w
163    }
164}
165#[doc = "Control SD pin of DM1 1Kx32"]
166pub type CTRL_FFE_SRAM_SD_DM1_A = CTRL_FFE_SRAM_SD_CM0_A;
167#[doc = "Field `CTRL_FFE_SRAM_SD_DM1` reader - Control SD pin of DM1 1Kx32"]
168pub type CTRL_FFE_SRAM_SD_DM1_R = CTRL_FFE_SRAM_SD_CM0_R;
169#[doc = "Field `CTRL_FFE_SRAM_SD_DM1` writer - Control SD pin of DM1 1Kx32"]
170pub struct CTRL_FFE_SRAM_SD_DM1_W<'a> {
171    w: &'a mut W,
172}
173impl<'a> CTRL_FFE_SRAM_SD_DM1_W<'a> {
174    #[doc = r"Writes `variant` to the field"]
175    #[inline(always)]
176    pub fn variant(self, variant: CTRL_FFE_SRAM_SD_DM1_A) -> &'a mut W {
177        self.bit(variant.into())
178    }
179    #[doc = "Disable the shut down function of SRAM Macro."]
180    #[inline(always)]
181    pub fn disable_shut_down(self) -> &'a mut W {
182        self.variant(CTRL_FFE_SRAM_SD_DM1_A::DISABLE_SHUT_DOWN)
183    }
184    #[doc = "Enable the shut down function of SRAM Macro, Memory content will be lost."]
185    #[inline(always)]
186    pub fn enable_shut_down(self) -> &'a mut W {
187        self.variant(CTRL_FFE_SRAM_SD_DM1_A::ENABLE_SHUT_DOWN)
188    }
189    #[doc = r"Sets the field bit"]
190    #[inline(always)]
191    pub fn set_bit(self) -> &'a mut W {
192        self.bit(true)
193    }
194    #[doc = r"Clears the field bit"]
195    #[inline(always)]
196    pub fn clear_bit(self) -> &'a mut W {
197        self.bit(false)
198    }
199    #[doc = r"Writes raw bits to the field"]
200    #[inline(always)]
201    pub fn bit(self, value: bool) -> &'a mut W {
202        self.w.bits =
203            (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2);
204        self.w
205    }
206}
207#[doc = "Control SD pin of SM0 1Kx18"]
208pub type CTRL_FFE_SRAM_SD_SM0_A = CTRL_FFE_SRAM_SD_CM0_A;
209#[doc = "Field `CTRL_FFE_SRAM_SD_SM0` reader - Control SD pin of SM0 1Kx18"]
210pub type CTRL_FFE_SRAM_SD_SM0_R = CTRL_FFE_SRAM_SD_CM0_R;
211#[doc = "Field `CTRL_FFE_SRAM_SD_SM0` writer - Control SD pin of SM0 1Kx18"]
212pub struct CTRL_FFE_SRAM_SD_SM0_W<'a> {
213    w: &'a mut W,
214}
215impl<'a> CTRL_FFE_SRAM_SD_SM0_W<'a> {
216    #[doc = r"Writes `variant` to the field"]
217    #[inline(always)]
218    pub fn variant(self, variant: CTRL_FFE_SRAM_SD_SM0_A) -> &'a mut W {
219        self.bit(variant.into())
220    }
221    #[doc = "Disable the shut down function of SRAM Macro."]
222    #[inline(always)]
223    pub fn disable_shut_down(self) -> &'a mut W {
224        self.variant(CTRL_FFE_SRAM_SD_SM0_A::DISABLE_SHUT_DOWN)
225    }
226    #[doc = "Enable the shut down function of SRAM Macro, Memory content will be lost."]
227    #[inline(always)]
228    pub fn enable_shut_down(self) -> &'a mut W {
229        self.variant(CTRL_FFE_SRAM_SD_SM0_A::ENABLE_SHUT_DOWN)
230    }
231    #[doc = r"Sets the field bit"]
232    #[inline(always)]
233    pub fn set_bit(self) -> &'a mut W {
234        self.bit(true)
235    }
236    #[doc = r"Clears the field bit"]
237    #[inline(always)]
238    pub fn clear_bit(self) -> &'a mut W {
239        self.bit(false)
240    }
241    #[doc = r"Writes raw bits to the field"]
242    #[inline(always)]
243    pub fn bit(self, value: bool) -> &'a mut W {
244        self.w.bits =
245            (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3);
246        self.w
247    }
248}
249#[doc = "Control SD pin of SM1 0.5Kx18"]
250pub type CTRL_FFE_SRAM_SD_SM1_A = CTRL_FFE_SRAM_SD_CM0_A;
251#[doc = "Field `CTRL_FFE_SRAM_SD_SM1` reader - Control SD pin of SM1 0.5Kx18"]
252pub type CTRL_FFE_SRAM_SD_SM1_R = CTRL_FFE_SRAM_SD_CM0_R;
253#[doc = "Field `CTRL_FFE_SRAM_SD_SM1` writer - Control SD pin of SM1 0.5Kx18"]
254pub struct CTRL_FFE_SRAM_SD_SM1_W<'a> {
255    w: &'a mut W,
256}
257impl<'a> CTRL_FFE_SRAM_SD_SM1_W<'a> {
258    #[doc = r"Writes `variant` to the field"]
259    #[inline(always)]
260    pub fn variant(self, variant: CTRL_FFE_SRAM_SD_SM1_A) -> &'a mut W {
261        self.bit(variant.into())
262    }
263    #[doc = "Disable the shut down function of SRAM Macro."]
264    #[inline(always)]
265    pub fn disable_shut_down(self) -> &'a mut W {
266        self.variant(CTRL_FFE_SRAM_SD_SM1_A::DISABLE_SHUT_DOWN)
267    }
268    #[doc = "Enable the shut down function of SRAM Macro, Memory content will be lost."]
269    #[inline(always)]
270    pub fn enable_shut_down(self) -> &'a mut W {
271        self.variant(CTRL_FFE_SRAM_SD_SM1_A::ENABLE_SHUT_DOWN)
272    }
273    #[doc = r"Sets the field bit"]
274    #[inline(always)]
275    pub fn set_bit(self) -> &'a mut W {
276        self.bit(true)
277    }
278    #[doc = r"Clears the field bit"]
279    #[inline(always)]
280    pub fn clear_bit(self) -> &'a mut W {
281        self.bit(false)
282    }
283    #[doc = r"Writes raw bits to the field"]
284    #[inline(always)]
285    pub fn bit(self, value: bool) -> &'a mut W {
286        self.w.bits =
287            (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4);
288        self.w
289    }
290}
291#[doc = "Control SD pin of CM1 2Kx40"]
292pub type CTRL_FFE_SRAM_SD_CM1_A = CTRL_FFE_SRAM_SD_CM0_A;
293#[doc = "Field `CTRL_FFE_SRAM_SD_CM1` reader - Control SD pin of CM1 2Kx40"]
294pub type CTRL_FFE_SRAM_SD_CM1_R = CTRL_FFE_SRAM_SD_CM0_R;
295#[doc = "Field `CTRL_FFE_SRAM_SD_CM1` writer - Control SD pin of CM1 2Kx40"]
296pub struct CTRL_FFE_SRAM_SD_CM1_W<'a> {
297    w: &'a mut W,
298}
299impl<'a> CTRL_FFE_SRAM_SD_CM1_W<'a> {
300    #[doc = r"Writes `variant` to the field"]
301    #[inline(always)]
302    pub fn variant(self, variant: CTRL_FFE_SRAM_SD_CM1_A) -> &'a mut W {
303        self.bit(variant.into())
304    }
305    #[doc = "Disable the shut down function of SRAM Macro."]
306    #[inline(always)]
307    pub fn disable_shut_down(self) -> &'a mut W {
308        self.variant(CTRL_FFE_SRAM_SD_CM1_A::DISABLE_SHUT_DOWN)
309    }
310    #[doc = "Enable the shut down function of SRAM Macro, Memory content will be lost."]
311    #[inline(always)]
312    pub fn enable_shut_down(self) -> &'a mut W {
313        self.variant(CTRL_FFE_SRAM_SD_CM1_A::ENABLE_SHUT_DOWN)
314    }
315    #[doc = r"Sets the field bit"]
316    #[inline(always)]
317    pub fn set_bit(self) -> &'a mut W {
318        self.bit(true)
319    }
320    #[doc = r"Clears the field bit"]
321    #[inline(always)]
322    pub fn clear_bit(self) -> &'a mut W {
323        self.bit(false)
324    }
325    #[doc = r"Writes raw bits to the field"]
326    #[inline(always)]
327    pub fn bit(self, value: bool) -> &'a mut W {
328        self.w.bits =
329            (self.w.bits & !(0x01 << 5)) | ((value as u32 & 0x01) << 5);
330        self.w
331    }
332}
333#[doc = "Control SD pin of CM0 1Kx32"]
334pub type CTRL_FFE_SRAM_SD_DM2_A = CTRL_FFE_SRAM_SD_CM0_A;
335#[doc = "Field `CTRL_FFE_SRAM_SD_DM2` reader - Control SD pin of CM0 1Kx32"]
336pub type CTRL_FFE_SRAM_SD_DM2_R = CTRL_FFE_SRAM_SD_CM0_R;
337#[doc = "Field `CTRL_FFE_SRAM_SD_DM2` writer - Control SD pin of CM0 1Kx32"]
338pub struct CTRL_FFE_SRAM_SD_DM2_W<'a> {
339    w: &'a mut W,
340}
341impl<'a> CTRL_FFE_SRAM_SD_DM2_W<'a> {
342    #[doc = r"Writes `variant` to the field"]
343    #[inline(always)]
344    pub fn variant(self, variant: CTRL_FFE_SRAM_SD_DM2_A) -> &'a mut W {
345        self.bit(variant.into())
346    }
347    #[doc = "Disable the shut down function of SRAM Macro."]
348    #[inline(always)]
349    pub fn disable_shut_down(self) -> &'a mut W {
350        self.variant(CTRL_FFE_SRAM_SD_DM2_A::DISABLE_SHUT_DOWN)
351    }
352    #[doc = "Enable the shut down function of SRAM Macro, Memory content will be lost."]
353    #[inline(always)]
354    pub fn enable_shut_down(self) -> &'a mut W {
355        self.variant(CTRL_FFE_SRAM_SD_DM2_A::ENABLE_SHUT_DOWN)
356    }
357    #[doc = r"Sets the field bit"]
358    #[inline(always)]
359    pub fn set_bit(self) -> &'a mut W {
360        self.bit(true)
361    }
362    #[doc = r"Clears the field bit"]
363    #[inline(always)]
364    pub fn clear_bit(self) -> &'a mut W {
365        self.bit(false)
366    }
367    #[doc = r"Writes raw bits to the field"]
368    #[inline(always)]
369    pub fn bit(self, value: bool) -> &'a mut W {
370        self.w.bits =
371            (self.w.bits & !(0x01 << 6)) | ((value as u32 & 0x01) << 6);
372        self.w
373    }
374}
375#[doc = "Control SD pin of CM0 1Kx32"]
376pub type CTRL_FFE_SRAM_SD_DM3_A = CTRL_FFE_SRAM_SD_CM0_A;
377#[doc = "Field `CTRL_FFE_SRAM_SD_DM3` reader - Control SD pin of CM0 1Kx32"]
378pub type CTRL_FFE_SRAM_SD_DM3_R = CTRL_FFE_SRAM_SD_CM0_R;
379#[doc = "Field `CTRL_FFE_SRAM_SD_DM3` writer - Control SD pin of CM0 1Kx32"]
380pub struct CTRL_FFE_SRAM_SD_DM3_W<'a> {
381    w: &'a mut W,
382}
383impl<'a> CTRL_FFE_SRAM_SD_DM3_W<'a> {
384    #[doc = r"Writes `variant` to the field"]
385    #[inline(always)]
386    pub fn variant(self, variant: CTRL_FFE_SRAM_SD_DM3_A) -> &'a mut W {
387        self.bit(variant.into())
388    }
389    #[doc = "Disable the shut down function of SRAM Macro."]
390    #[inline(always)]
391    pub fn disable_shut_down(self) -> &'a mut W {
392        self.variant(CTRL_FFE_SRAM_SD_DM3_A::DISABLE_SHUT_DOWN)
393    }
394    #[doc = "Enable the shut down function of SRAM Macro, Memory content will be lost."]
395    #[inline(always)]
396    pub fn enable_shut_down(self) -> &'a mut W {
397        self.variant(CTRL_FFE_SRAM_SD_DM3_A::ENABLE_SHUT_DOWN)
398    }
399    #[doc = r"Sets the field bit"]
400    #[inline(always)]
401    pub fn set_bit(self) -> &'a mut W {
402        self.bit(true)
403    }
404    #[doc = r"Clears the field bit"]
405    #[inline(always)]
406    pub fn clear_bit(self) -> &'a mut W {
407        self.bit(false)
408    }
409    #[doc = r"Writes raw bits to the field"]
410    #[inline(always)]
411    pub fn bit(self, value: bool) -> &'a mut W {
412        self.w.bits =
413            (self.w.bits & !(0x01 << 7)) | ((value as u32 & 0x01) << 7);
414        self.w
415    }
416}
417impl R {
418    #[doc = "Bit 0 - Control SD pin of CM0 8Kx40"]
419    #[inline(always)]
420    pub fn ctrl_ffe_sram_sd_cm0(&self) -> CTRL_FFE_SRAM_SD_CM0_R {
421        CTRL_FFE_SRAM_SD_CM0_R::new((self.bits & 0x01) != 0)
422    }
423    #[doc = "Bit 1 - Control SD pin of DM0 1Kx32"]
424    #[inline(always)]
425    pub fn ctrl_ffe_sram_sd_dm0(&self) -> CTRL_FFE_SRAM_SD_DM0_R {
426        CTRL_FFE_SRAM_SD_DM0_R::new(((self.bits >> 1) & 0x01) != 0)
427    }
428    #[doc = "Bit 2 - Control SD pin of DM1 1Kx32"]
429    #[inline(always)]
430    pub fn ctrl_ffe_sram_sd_dm1(&self) -> CTRL_FFE_SRAM_SD_DM1_R {
431        CTRL_FFE_SRAM_SD_DM1_R::new(((self.bits >> 2) & 0x01) != 0)
432    }
433    #[doc = "Bit 3 - Control SD pin of SM0 1Kx18"]
434    #[inline(always)]
435    pub fn ctrl_ffe_sram_sd_sm0(&self) -> CTRL_FFE_SRAM_SD_SM0_R {
436        CTRL_FFE_SRAM_SD_SM0_R::new(((self.bits >> 3) & 0x01) != 0)
437    }
438    #[doc = "Bit 4 - Control SD pin of SM1 0.5Kx18"]
439    #[inline(always)]
440    pub fn ctrl_ffe_sram_sd_sm1(&self) -> CTRL_FFE_SRAM_SD_SM1_R {
441        CTRL_FFE_SRAM_SD_SM1_R::new(((self.bits >> 4) & 0x01) != 0)
442    }
443    #[doc = "Bit 5 - Control SD pin of CM1 2Kx40"]
444    #[inline(always)]
445    pub fn ctrl_ffe_sram_sd_cm1(&self) -> CTRL_FFE_SRAM_SD_CM1_R {
446        CTRL_FFE_SRAM_SD_CM1_R::new(((self.bits >> 5) & 0x01) != 0)
447    }
448    #[doc = "Bit 6 - Control SD pin of CM0 1Kx32"]
449    #[inline(always)]
450    pub fn ctrl_ffe_sram_sd_dm2(&self) -> CTRL_FFE_SRAM_SD_DM2_R {
451        CTRL_FFE_SRAM_SD_DM2_R::new(((self.bits >> 6) & 0x01) != 0)
452    }
453    #[doc = "Bit 7 - Control SD pin of CM0 1Kx32"]
454    #[inline(always)]
455    pub fn ctrl_ffe_sram_sd_dm3(&self) -> CTRL_FFE_SRAM_SD_DM3_R {
456        CTRL_FFE_SRAM_SD_DM3_R::new(((self.bits >> 7) & 0x01) != 0)
457    }
458}
459impl W {
460    #[doc = "Bit 0 - Control SD pin of CM0 8Kx40"]
461    #[inline(always)]
462    pub fn ctrl_ffe_sram_sd_cm0(&mut self) -> CTRL_FFE_SRAM_SD_CM0_W {
463        CTRL_FFE_SRAM_SD_CM0_W { w: self }
464    }
465    #[doc = "Bit 1 - Control SD pin of DM0 1Kx32"]
466    #[inline(always)]
467    pub fn ctrl_ffe_sram_sd_dm0(&mut self) -> CTRL_FFE_SRAM_SD_DM0_W {
468        CTRL_FFE_SRAM_SD_DM0_W { w: self }
469    }
470    #[doc = "Bit 2 - Control SD pin of DM1 1Kx32"]
471    #[inline(always)]
472    pub fn ctrl_ffe_sram_sd_dm1(&mut self) -> CTRL_FFE_SRAM_SD_DM1_W {
473        CTRL_FFE_SRAM_SD_DM1_W { w: self }
474    }
475    #[doc = "Bit 3 - Control SD pin of SM0 1Kx18"]
476    #[inline(always)]
477    pub fn ctrl_ffe_sram_sd_sm0(&mut self) -> CTRL_FFE_SRAM_SD_SM0_W {
478        CTRL_FFE_SRAM_SD_SM0_W { w: self }
479    }
480    #[doc = "Bit 4 - Control SD pin of SM1 0.5Kx18"]
481    #[inline(always)]
482    pub fn ctrl_ffe_sram_sd_sm1(&mut self) -> CTRL_FFE_SRAM_SD_SM1_W {
483        CTRL_FFE_SRAM_SD_SM1_W { w: self }
484    }
485    #[doc = "Bit 5 - Control SD pin of CM1 2Kx40"]
486    #[inline(always)]
487    pub fn ctrl_ffe_sram_sd_cm1(&mut self) -> CTRL_FFE_SRAM_SD_CM1_W {
488        CTRL_FFE_SRAM_SD_CM1_W { w: self }
489    }
490    #[doc = "Bit 6 - Control SD pin of CM0 1Kx32"]
491    #[inline(always)]
492    pub fn ctrl_ffe_sram_sd_dm2(&mut self) -> CTRL_FFE_SRAM_SD_DM2_W {
493        CTRL_FFE_SRAM_SD_DM2_W { w: self }
494    }
495    #[doc = "Bit 7 - Control SD pin of CM0 1Kx32"]
496    #[inline(always)]
497    pub fn ctrl_ffe_sram_sd_dm3(&mut self) -> CTRL_FFE_SRAM_SD_DM3_W {
498        CTRL_FFE_SRAM_SD_DM3_W { w: self }
499    }
500    #[doc = "Writes raw bits to the register."]
501    #[inline(always)]
502    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
503        self.0.bits(bits);
504        self
505    }
506}
507#[doc = "Control the Shut Down pin of various elements in the Flexible Fusion Engine power domain. For each: 1'b1 : Enable the Deep Sleep function of SRAM Macro, Memory content will be kept.\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ffe_mem_ctrl_1](index.html) module"]
508pub struct FFE_MEM_CTRL_1_SPEC;
509impl crate::RegisterSpec for FFE_MEM_CTRL_1_SPEC {
510    type Ux = u32;
511}
512#[doc = "`read()` method returns [ffe_mem_ctrl_1::R](R) reader structure"]
513impl crate::Readable for FFE_MEM_CTRL_1_SPEC {
514    type Reader = R;
515}
516#[doc = "`write(|w| ..)` method takes [ffe_mem_ctrl_1::W](W) writer structure"]
517impl crate::Writable for FFE_MEM_CTRL_1_SPEC {
518    type Writer = W;
519}
520#[doc = "`reset()` method sets FFE_MEM_CTRL_1 to value 0"]
521impl crate::Resettable for FFE_MEM_CTRL_1_SPEC {
522    #[inline(always)]
523    fn reset_value() -> Self::Ux {
524        0
525    }
526}
eos_s3/pmu/ffe_mem_ctrl_1.rs

eos_s3/pmu/
ffe_mem_ctrl_1.rs
